NCV898032
www.onsemi.com
13
2. Select Current Sense Resistor
Current sensing for peak current mode control and current
limit relies on the MOSFET current signal, which is
measured with a ground referenced amplifier. Note that the
I
CL
equals the sum of the currents from both inductors. The
easiest method of generating this signal is to use a current
sense resistor from the source of the MOSFET to device
ground. The sense resistor should be selected as follows:
R
S
+
V
CL
I
CL
Where: R
S
: sense resistor [W]
V
CL
: current limit threshold voltage [V]
I
CL
: desire current limit [A]
3. Select SEPIC Inductors
The output inductor controls the current ripple that occurs
over a switching period. A high current ripple will result in
excessive power loss and ripple current requirements. A low
current ripple will result in a poor control signal and a slow
current slew rate in case of load steps. A good starting point
for peak to peak ripple is around 20−40% of the inductor
current at the maximum load at the worst case V
IN
, but
operation should be verified empirically. The worst case V
IN
is the minimum input voltage. After choosing a peak current
ripple value, calculate the inductor value as follows:
L +
V
IN(WC)
D
WC
DI
L,max
f
s
Where: V
IN(WC)
: V
IN
value as close as possible to half of
V
OUT
[V]
D
WC
: duty cycle at V
IN(WC)
DI
L,max
: maximum peak to peak ripple [A]
The maximum average inductor current can be calculated as
follows:
I
L,AVG
+
V
OUT
I
OUT(max)
V
IN(min)
h
The Peak Inductor current can be calculated as follows:
I
L1,peak
+ I
L1,avg
)
DI
L1
2
I
L2,peak
+ I
OUT(max)
)
DI
L2
2
Where (if L1 = L2): DI
L1
= DI
L2
4. Select Coupling Capacitor
Coupling capacitor RMS current is significant. A low
ESR ceramic capacitor is required as a coupling capacitor.
Selecting a capacitor value too low will result in high
capacitor ripple voltage which will distort ripple current and
diminish input line regulation capability. Budgeting 2−5%
coupling capacitor ripple voltage is a reasonable guideline.
DV
coupling
+
I
out
D
WC
C
coupling
f
s
Current mode control helps resolve some of the resonant
frequencies that create issues in voltage mode SEPIC
converter designs, but some resonance issues may occur. A
resonant frequency exists at
f
resonance
+
1
2p (L1 ) L2)C
coupling
Ǹ
It may become necessary to place an RC damping network
in parallel with the coupling capacitor if the resonance is
within ~1 decade of the closed−loop crossover frequency.
The capacitance of the damping capacitor should be ~5
times that of the coupling capacitor. The optimal damping
resistance (including the ESR of the damping capacitor) is
calculated as
R
damping
+
L1 ) L2
C
coupling
Ǹ
5. Select Output Capacitors
The output capacitors smooth the output voltage and
reduce the overshoot and undershoot associated with line
transients. The steady state output ripple associated with the
output capacitors can be calculated as follows:
V
OUT(ripple)
+
I
OUT(max)
D
WC
C
OUT
f
s
)
ǒ
I
OUT(max)
1 * D
WC
)
D
WC
V
IN(min)
2 f
s
L
2
Ǔ
R
esr
The capacitors need to survive an RMS ripple current as
follows:
I
Cout(RMS)
+
I
OUT(max)
2
D
WC
)
ǒ
I
2
a
)
I
2
r
3
* I
a
I
r
Ǔ
DȀ
WC
Ǹ
where
I
a
+ I
L1_peak
) I
L2_peak
* I
out
I
r
+ DI
L1
) DI
L2
The use of parallel ceramic bypass capacitors is strongly
encouraged to help with the transient response.
6. Select Input Capacitors
The input capacitor reduces voltage ripple on the input to
the module associated with the ac component of the input
current.
I
Cin(RMS)
+
DI
L1
12
Ǹ
7. Select Feedback Resistors
The feedback resistors form a resistor divider from the
output of the converter to ground, with a tap to the feedback
pin. During regulation, the divided voltage will equal V
ref
.
The lower feedback resistor can be chosen, and the upper
feedback resistor value is calculated as follows:
R
upper
+ R
lower
ǒ
V
out
* V
ref
Ǔ
V
ref
