16©2017 Integrated Device Technology, Inc. October 24, 2017
5L2503 Datasheet
Byte 6: PLL3 Charge Pump Control
Formula: (iRef (10μA) × (1 + SIREF) × (1 × 1X + 2 × 2X + 4 × 4X + 8 × 8X + 16 × 16X))/((24 × /24) + (3 × /3))
Byte 7: PLL1 Control and OUTDIV5 Divider
Byte 8: PLL1 M Divider
Byte 06h Name Control Function Type 0 1 PWD
Bit 7 OUTDIV 3 Source Output divider 3 source clock selection R/W PLL2 PLL3 0
Bit 6 PLL3_CP_8X PLL3 charge pump control R/W — x8 1
Bit 5 PLL3_CP_4X PLL3 charge pump control R/W — x4 1
Bit 4 PLL3_CP_2X PLL3 charge pump control R/W — x2 0
Bit 3 PLL3_CP_1X PLL3 charge pump control R/W — x1 1
Bit 2 PLL3_CP_/24 PLL3 charge pump control R/W — /24 1
Bit 1 PLL3_CP_/3 PLL3 charge pump control R/W — /3 0
Bit 0 PLL3_SIREF PLL3 SiRef current selection R/W 10μA20μA0
Byte 07h Name Control Function Type 0 1 PWD
Bit 7 PLL1_MDIV_Doubler PLL1 reference clock doubler R/W disable enable 0
Bit 6 PLL1_SIREF PLL1 SiRef current selection R/W 10.8μA21.6μA0
Bit 5 PLL1_EN_CH2 PLL1 output Channel 2 control R/W disable enable 1
Bit 4 PLL1_EN_3rdpole PLL1 3rd Pole control R/W disable enable 0
Bit 3 OUTDIV5[3] Output divider 5 control bit 3 R/W
DIV5[3:2] = 1,2,4,5; DIV5[1:0] =
1,3,5,10; Default Divider = 1 x 10 =
10
0
Bit 2 OUTDIV5[2] Output divider 5 control bit 2 R/W 0
Bit 1 OUTDIV5[1] Output divider 5 control bit 1 R/W 1
Bit 0 OUTDIV5[0] Output divider 5 control bit 0 R/W 1
Byte 08h Name Control Function Type 0 1 PWD
Bit 7 PLL1_MDIV1 PLL3 VCO reference clock divider 1 R/W disable M DIV1 bypass divider (/1) 0
Bit 6 PLL1_MDIV2 PLL3 VCO reference clock divider 2 R/W disable M DIV2 bypass divider (/2) 0
Bit 5 PLL1 M_DIV[5] PLL1 reference clock divider control bit 5 R/W
3–64, default is 26
0
Bit 4 PLL1 M_DIV[4] PLL1 reference clock divider control bit 4 R/W 1
Bit 3 PLL1 M_DIV[3] PLL1 reference clock divider control bit 3 R/W 1
Bit 2 PLL1 M_DIV[2] PLL1 reference clock divider control bit 2 R/W 0
Bit 1 PLL1 M_DIV[1] PLL1 reference clock divider control bit 1 R/W 1
Bit 0 PLL1 M_DIV[0] PLL1 reference clock divider control bit 0 R/W 0