1. General description
The 74LV393 is a low–voltage Si-gate CMOS device and is pin and function compatible
with 74HC393 and 74HCT393.
The 74LV393 is a dual 4-stage binary ripple counter. Each counter features a clock input
(nCP
), an overriding asynchronous master reset input (nMR) and 4 buffered parallel
outputs (nQ0 to nQ3). The counter advances on the HIGH-to-LOW transition of nCP
. A
HIGH on nMR clears the counter stages and forces the outputs LOW, independent of the
state of nCP
.
2. Features and benefits
Optimized for low voltage applications: 1.0 V to 3.6 V
Accepts TTL input levels between V
CC
= 2.7 V and V
CC
= 3.6 V
Typical V
OLP
(output ground bounce) 0.8 V at V
CC
= 3.3 V, T
amb
= 25 C
Typical V
OHV
(output V
OH
undershoot) 2 V at V
CC
= 3.3 V, T
amb
= 25 C
Two 4-bit binary counters with individual clocks
Divide-by any binary module up to 28 in one package
Two master resets to clear each 4-bit counter individually
Complies with JEDEC standard no. 7A
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
3. Ordering information
74LV393
Dual 4-bit binary ripple counter
Rev. 4 — 18 September 2014 Product data sheet
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74LV393N 40 C to +125 C DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1
74LV393D 40 C to +125 C SO14 plastic small outline package; 14 leads; body
width 3.9 mm
SOT108-1
74LV393DB 40 C to +125 C SSOP14 plastic shrink small outline package; 14 leads;
body width 5.3 mm
SOT337-1
74LV393PW 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14
leads; body width 4.4 mm
SOT402-1
74LV393 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4 — 18 September 2014 2 of 18
NXP Semiconductors
74LV393
Dual 4-bit binary ripple counter
4. Functional diagram
Fig 1. Logic symbol Fig 2. IEC logic symbol
DDG
&3

05
4
4
4
4
&3




05
4
4
4
4
DDG
&7 
&7




&7 
&7
&75
&75
Fig 3. Functional diagram Fig 4. State diagram
DDG
&3
%,7
%,1$5<
5,33/(
&2817(5
%,7
%,1$5<
5,33/(
&2817(5
05
4
4
4
4
&3




05
4
4
4
4
DDG




 
74LV393 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4 — 18 September 2014 3 of 18
NXP Semiconductors
74LV393
Dual 4-bit binary ripple counter
5. Pinning information
5.1 Pinning
5.2 Pin description
Fig 5. Logic diagram (one counter)
DDG
5'
))
7&3
4
05
5'
))
7
4
5'
))
7
4
5'
))
7
4
4 4 4 4
Fig 6. Pin configuration DIP14 and SO14 Fig 7. Pin configuration SSOP14 and TSSOP14
/9
&3 9
&&
05 &3
4 05
4
4
4
4
4
4
*1'
4
DDD





/9
&3 9
&&
05 &3
4 05
4 4
4 4
4 4
*1' 4
DDD





Table 2. Pin description
Symbol Pin Description
1CP
1 clock input (HIGH-to-LOW, edge-triggered)
1MR 2 asynchronous master reset input (active HIGH)
1Q0 3 flip-flop output
1Q1 4 flip-flop output
1Q2 5 flip-flop output
1Q3 6 flip-flop output
GND 7 ground (0 V)
2Q3 8 flip-flop output

74LV393N,112

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Counter ICs DUAL 4-BIT BINARY
Lifecycle:
New from this manufacturer.
Delivery:
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