Important notice
Dear Customer,
On 7 February 2017 the former NXP Standard Product business became a new company with the
tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS
semiconductors with its focus on the automotive, industrial, computing, consumer and wearable
application markets
In data sheets and application notes which still contain NXP or Philips Semiconductors references, use
the references to Nexperia, as shown below.
Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/,
use http://www.nexperia.com
Instead of sales.addresses@www.nxp.com or sales.addresses@www.semiconductors.philips.com, use
salesaddresses@nexperia.com (email)
Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on
the version, as shown below:
- © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights
reserved
Should be replaced with:
- © Nexperia B.V. (year). All rights reserved.
If you have any questions related to the data sheet, please contact our nearest sales office via e-mail
or telephone (details via salesaddresses@nexperia.com). Thank you for your cooperation and
understanding,
Kind regards,
Team Nexperia
1. General description
The 74AHC32-Q100; 74AHCT32-Q100 is a high-speed Si-gate CMOS device and is pin
compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with
JEDEC standard No. 7-A.
The 74AHC32-Q100; 74AHCT32-Q100 provides the 2-input OR function.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Balanced propagation delays
All inputs have Schmitt-trigger actions
Inputs accept voltages higher than V
CC
Input levels:
For 74AHC32-Q100: CMOS level
For 74AHCT32-Q100: TTL level
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
Multiple package options
74AHC32-Q100; 74AHCT32-Q100
Quad 2-input OR gate
Rev. 1 — 26 March 2013 Product data sheet
74AHC_AHCT32_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 26 March 2013 2 of 15
NXP Semiconductors 74AHC32-Q100; 74AHCT32-Q100
Quad 2-input OR gate
3. Ordering information
4. Functional diagram
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74AHC32-Q100
74AHC32D-Q100 40 C to +125 C SO14 plastic small outline package; 14 leads;
body width 3.9 mm
SOT108-1
74AHC32PW-Q100 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
74AHC32BQ-Q100 40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads;
14 terminals; body 2.5 3 0.85 mm
SOT762-1
74AHCT32-Q100
74AHCT32D-Q100 40 C to +125 C SO14 plastic small outline package; 14 leads;
body width 3.9 mm
SOT108-1
74AHCT32PW-Q100 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
74AHCT32BQ-Q100 40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads;
14 terminals; body 2.5 3 0.85 mm
SOT762-1
Fig 1. Logic symbol Fig 2. IEC logic symbol
mna242
1A
1B
1Y
2
1
3
2A
2B
2Y
5
4
6
3A
3B
3Y
10
9
8
4A
4B
4Y
13
12
11
mna243
3
1
1
1
1
2
1
6
5
4
8
10
9
11
13
12
Fig 3. Logic diagram (one gate)
mna241
A
B
Y

74AHC32BQ-Q100X

Mfr. #:
Manufacturer:
Nexperia
Description:
Logic Gates 74AHC32BQ-Q100/DHVQFN14/REEL 7
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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