6
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. 00D
06/02/08
IS42S32200E
FUNCTION (In Detail)
A0-A10 are address inputs sampled during the ACTIVE
(row-address A0-A10)
and READ/WRITE command
(A0-A7
with A10 defining auto PRECHARGE)
. A10 is sampled during
a PRECHARGE command to determine if all banks are to
be PRECHARGED
(A10 HIGH)
or bank selected by BA0,
BA1
(LOW)
. The address inputs also provide the op-code
during a LOAD MODE REGISTER command.
Bank Select Address
(BA0 and BA1)
defines which bank the
ACTIVE, READ, WRITE or PRECHARGE command is
being applied.
CAS, in conjunction with the RAS and WE, forms the
device command. See the “Command Truth Table” for
details on device commands.
The CKE input determines whether the CLK input is
enabled. The next rising edge of the CLK signal will be
valid when is CKE HIGH and invalid when LOW. When
CKE is LOW, the device will be in either power-down
mode, CLOCK SUSPEND mode, or SELF-REFRESH
mode. CKE is an asynchronous input.
CLK is the master clock input for this device. Except for
CKE, all inputs to this device are acquired in synchroni-
zation with the rising edge of this pin.
The CS input determines whether command input is
enabled within the device. Command input is enabled
when CS is LOW, and disabled with CS is HIGH. The
device remains in the previous state when CS is HIGH. DQ0
through DQ7 are controlled by DQM0. DQ8 through DQ15
are controlled by DQM1. DQ16 through DQ23 are controlled
by DQM2. DQ24 through DQ31 are controlled by DQM3.
In
read mode, DQMx control the output buffer. When DQMx is
LOW, the corresponding buffer byte is enabled, and when
HIGH, disabled. The outputs go to the HIGH Impedance
State when DQMx is HIGH. This function corresponds to
OE in conventional DRAMs. In write mode, DQMx control
the input buffer. When DQMx is LOW, the corresponding
buffer byte is enabled, and data can be written to the device.
When DQMx is HIGH, input data is masked and cannot be
written to the device.
RAS, in conjunction with CAS and WE , forms the device
command. See the “Command Truth Table” item for
details on device commands.
WE , in conjunction with RAS and CAS , forms the device
command. See the “Command Truth Table” item for
details on device commands.
VDDQ is the output buffer power supply.
VDD is the device internal power supply.
GNDQ is the output buffer ground.
GND is the device internal ground.
READ
The READ command selects the bank from BA0, BA1
inputs and starts a burst read access to an active row.
Inputs A0-A7 provides the starting column location. When
A10 is HIGH, this command functions as an AUTO
PRECHARGE command. When the auto precharge is
selected, the row being accessed will be precharged at
the end of the READ burst. The row will remain open for
subsequent accesses when AUTO PRECHARGE is not
selected. DQ’s read data is subject to the logic level on
the DQM inputs two clocks earlier. When a given DQM
signal was registered HIGH, the corresponding DQ’s will
be High-Z two clocks later. DQ’s will provide valid data
when the DQM signal was registered LOW.
WRITE
A burst write access to an active row is initiated with the
WRITE command. BA0, BA1 inputs selects the bank, and
the starting column location is provided by inputs A0-A7.
Whether or not AUTO-PRECHARGE is used is deter-
mined by A10.
The row being accessed will be precharged at the end of
the WRITE burst, if AUTO PRECHARGE is selected. If
AUTO PRECHARGE is not selected, the row will remain
open for subsequent accesses.
A memory array is written with corresponding input data
on DQ’s and DQM input logic level appearing at the same
time. Data will be written to memory when DQM signal is
LOW. When DQM is HIGH, the corresponding data inputs
will be ignored, and a WRITE will not be executed to that
byte/column location.
PRECHARGE
The PRECHARGE command is used to deactivate the
open row in a particular bank or the open row in all banks.
BA0, BA1 can be used to select which bank is precharged
or they are treated as “Don’t Care”. A10 determined
whether one or all banks are precharged. After executing
this command, the next command for the selected banks(s)
is executed after passage of the period t
RP
, which is the
period required for bank precharging. Once a bank has
been precharged, it is in the idle state and must be
activated prior to any READ or WRITE commands being
issued to that bank.
AUTO PRECHARGE
The AUTO PRECHARGE function ensures that the
precharge is initiated at the earliest valid stage within a
burst. This function allows for individual-bank precharge
without requiring an explicit command. A10 to enables the
AUTO PRECHARGE function in conjunction with a spe-
cific READ or WRITE command. For each individual
READ or WRITE command, auto precharge is either
