MAX8576–MAX8579
3V to 28V Input, Low-Cost, Hysteretic
Synchronous Step-Down Controllers
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Nominal switching frequency is programmable over the
200kHz to 500kHz range. High-side MOSFET sensing
is used for adjustable hiccup current-limit and short-cir-
cuit protection. The MAX8576/MAX8578 can start up
into a precharged output without pulling the output volt-
age down. The MAX8577/MAX8579 have startup output
overvoltage protection (OVP).
The MAX8578/MAX8579 have a logic-enable input to
turn on and off the output. The MAX8576/MAX8577 are
turned off by pulling SS low with an external small
n-channel MOSFET (see Figure 2).
DC-DC Converter Control Architecture
A proprietary hysteretic-PWM control scheme ensures
high efficiency, fast switching, and fast transient
response. This control scheme is simple: when the out-
put voltage falls below the regulation threshold, the
error comparator begins a switching cycle by turning
on the high-side switch. This switch remains on until the
minimum on-time expires and the output voltage is in
regulation or the current-limit threshold is exceeded.
Once off, the high-side switch remains off until the mini-
mum off-time expires and the output voltage falls below
the regulation threshold. During this period, the low-
side synchronous rectifier turns on and remains on until
the voltage at FB drops below its regulation threshold.
The internal synchronous rectifier eliminates the need
for an external Schottky diode.
Voltage-Positioning Load Regulation
As seen in Figures 2 and 3, the MAX8576–MAX8579 use
a unique feedback network. By taking feedback from the
LX node through R3 (R11 for the MAX8578/MAX8579),
the usual phase lag due to the output capacitor does not
exist, making the loop stable for either electrolytic or
ceramic output capacitors. This configuration causes the
output voltage to shift by the inductor DC resistance mul-
tiplied by the load current. This voltage-positioning load
regulation greatly reduces overshoot during load tran-
sients, which effectively halves the peak-to-peak output-
voltage excursions compared to traditional step-down
converters. See the Load Transient graphs in the Typical
Operating Characteristics.
Internal 5V Linear Regulator
All MAX8576/MAX8577 functions are powered from the
on-chip, low-dropout 5V regulator with the input con-
nected to IN. Bypass the regulator’s output (VL) with a
1µF or greater ceramic capacitor. The capacitor must
have an equivalent series resistance (ESR) of no
greater than 10mΩ. When V
IN
is less than 5.5V, short
VL to IN. The MAX8578/MAX8579 do not have the on-
chip 5V regulator and must use a separate external
supply from 3V to 5.5V connected to V
CC
if the input
voltage is greater than 5.5V.
Undervoltage Lockout
If VL (MAX8576/MAX8577) or V
CC
(MAX8578/MAX8579)
drops below 2.45V (typ), the MAX8576–MAX8579
assume that the supply voltage is too low for proper cir-
cuit operation, so the UVLO circuitry inhibits switching
and forces the DL and DH gate drivers low for the
MAX8576/MAX8578, and DH low and DL high for the
MAX8577/MAX8579. After V
IN
rises above 2.8V (typ),
the controller goes into the startup sequence and
resumes normal operation.
Output Overvoltage Protection
The MAX8576–MAX8579 output overvoltage protection
is provided by a glitch-resistant comparator on FB with
a trip threshold of 750mV (typ). The overvoltage-protec-
tion circuit is latched by an OVP fault, terminating the
run cycle and setting DH low and DL high. The fault is
cleared by toggling EN or UVLO. Output OVP is active
whenever the internal reference is in regulation.
Startup and Soft-Start
The soft-start sequence is initiated upon initial power-
up, recovering from UVLO, or driving EN (MAX8578/
MAX8579) high from a low state, or releasing SS
(MAX8576/MAX8577) from a low state. The external
soft-start capacitor (C
SS
) is connected to an internal
resistor-divider that exponentially charges the capacitor
to 0.6V, with an SS ramp interval of 5 x RC or 4ms per
0.01µF. SS is one input to the internal voltage error
comparator, while FB is the other input. The output volt-
age fed back to FB tracks the rising SS voltage.
Switching commences immediately if V
FB
is initially less
than V
SS
; if V
FB
is greater than V
SS
, DH remains low
until V
FB
is less than V
SS
. DL remains low in the
MAX8576/MAX8578. This prevents the converter from
operating in reverse. However, DL is high before start-
up in the MAX8577/MAX8579 to enable OVP protection
in case the high-side MOSFET is shorted.
Enable
Connecting EN to GND or logic low places the
MAX8578/MAX8579 in shutdown mode. In shutdown,
DH and DL are forced low, and the voltage at SS is dis-
charged with a 250nA current, resulting in a ramp-down
interval of approximately 10x the soft-start ramp-up
interval. V
SS
must fall to within 50mV of GND before
another cycle can commence. SS (MAX8576/
MAX8577) or EN (MAX8578/MAX8579) do not need to
be cycled after an overcurrent event. Connect EN to
V
CC
or logic high for normal operation. To shut down the
MAX8576/MAX8577, use an external circuit connected
