1/9July 2001
■ HIGH SPEED: t
PD
= 3.6ns (TYP.) at V
CC
= 5V
■ LOW POWER DISSIPATION:
I
CC
= 1µA(MAX.) at T
A
=25°C
■ HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28% V
CC
(MIN.)
■ POWER DOWN PROTECTION ON INPUTS
■ SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 8mA (MIN) at V
CC
= 4.5V
■ BALANCED PROPAGATION DELAYS:
t
PLH
≅ t
PHL
■ OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 5.5V
■ IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74V1G02 is an advanced high-speed CMOS
SINGLE 2-INPUT NOR GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology.
The internal circuit is composed of 3 stages
including buffer output, which provide high noise
immunity and stable output.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
74V1G02
SINGLE 2-INPUT NOR GATE
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE T & R
SOT23-5L 74V1G02STR
SOT323-5L 74V1G02CTR
SOT323-5LSOT23-5L