MC74AC574DTR2G

© Semiconductor Components Industries, LLC, 2006
December, 2006 − Rev. 8
1 Publication Order Number:
MC74AC574/D
MC74AC574, MC74ACT574
Octal D Flip−Flop with
3−State Outputs
The MC74AC574/74ACT574 is a high−speed, low power octal
flip−flop with a buffered common Clock (CP) and a buffered common
Output Enable (OE). The information presented to the D inputs is
stored in the flip−flops on the LOW−to−HIGH Clock (CP) transition.
The MC74AC574/74ACT574 is functionally identical to the
MC74AC374/74ACT374 except for the pinouts.
Features
Inputs and Outputs on Opposite Sides of Package Allowing Easy
Interface with Microprocessors
Useful as Input or Output Port for Microprocessors
Functionally Identical to MC74AC374/74ACT374
3-State Outputs for Bus-Oriented Applications
Outputs Source/Sink 24 mA
ACT574 Has TTL Compatible Inputs
Pb−Free Packages are Available
Figure 1. Pinout: 20−Lead Packages Conductors
(Top View)
1920 18 17 16 15 14
21 34567
V
CC
13
8
12
9
11
10
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
CP
OE D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
GND
PIN ASSIGNMENT
PIN FUNCTION
D
0
−D
7
Data Inputs
CP Clock Pulse Input
OE 3−State Output Enable Input
O
0
−O
7
3−State Outputs
Figure 2. Logic Symbol
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
CP
OE
See general marking information in the device marking
section on page 6 of this data sheet.
DEVICE MARKING INFORMATION
http://onsemi.com
SOIC−20W
DW SUFFIX
CASE 751D
TSSOP−20
DT SUFFIX
CASE 948E
SOEIAJ−20
M SUFFIX
CASE 967
1
1
1
PDIP−20
N SUFFIX
CASE 738
1
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
ORDERING INFORMATION
MC74AC574, MC74ACT574
http://onsemi.com
2
FUNCTIONAL DESCRIPTION
The MC74AC574/74ACT574 consists of eight edge-
triggered flip−flops with individual D−type inputs and
3−state true outputs. The buffered clock and buffered Output
Enable are common to all flip−flops. The eight flip−flops
will store the state of their individual D inputs that meet the
setup and hold time requirements on the LOW−to−HIGH
Clock (CP) transition. With the Output Enable (OE) LOW,
the contents of the eight flip−flops are available at the
outputs. When OE is HIGH, the outputs go to the high
impedance state. Operation of the OE input does not affect
the state of the flip−flops.
FUNCTION TABLE
Inputs Internal Outputs
Function
OE CP D Q O
n
H H L NC Z Hold
H HH NC Z Hold
H LL Z Load
H HH Z Load
L LL L Data Available
L HH H Data Available
L HL NC NC No Change in Data
L H H NC NC No Change in Data
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
= LOW-to-HIGH Clock Transition
NC = No Change
Figure 3. Logic Diagram
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
CD
Q
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
OE
CP
CD
Q
CD
Q
CD
Q
CD
Q
CD
Q
CD
Q
CD
Q
NOTE: This diagram is provided only for the understanding of logic operations
and should not be used to estimate propagation delays.
MAXIMUM RATINGS
Symbol Parameter Value Unit
V
CC
DC Supply Voltage (Referenced to GND) −0.5 to +7.0 V
V
IN
DC Input Voltage (Referenced to GND) −0.5 to V
CC
+0.5 V
V
OUT
DC Output Voltage (Referenced to GND) −0.5 to V
CC
+0.5 V
I
IN
DC Input Current, per Pin ±20 mA
I
OUT
DC Output Sink/Source Current, per Pin ±50 mA
I
CC
DC V
CC
or GND Current per Output Pin ±50 mA
T
stg
Storage Temperature −65 to +150 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
MC74AC574, MC74ACT574
http://onsemi.com
3
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Typ Max Unit
V
CC
Supply Voltage
AC 2.0 5.0 6.0
V
ACT 4.5 5.0 5.5
V
IN
, V
OUT
DC Input Voltage, Output Voltage (Ref. to GND) 0 V
CC
V
t
r
, t
f
Input Rise and Fall Time (Note 1)
AC Devices except Schmitt Inputs
V
CC
@ 3.0 V 150
V
CC
@ 4.5 V 40 ns/V
V
CC
@ 5.5 V 25
t
r
, t
f
Input Rise and Fall Time (Note 2)
ACT Devices except Schmitt Inputs
V
CC
@ 4.5 V 10
ns/V
V
CC
@ 5.5 V 8.0
T
J
Junction Temperature (PDIP) 140 °C
T
A
Operating Ambient Temperature Range −40 25 85 °C
I
OH
Output Current − High −24 mA
I
OL
Output Current − Low 24 mA
1. V
IN
from 30% to 70% V
CC
; see individual Data Sheets for devices that differ from the typical input rise and fall times.
2. V
IN
from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
DC CHARACTERISTICS
Symbol Parameter
V
CC
(V)
74AC 74AC
Unit Conditions
T
A
= +25°C T
A
= −40°C to +85°C
Typ Guaranteed Limits
V
IH
Minimum High Level
Input Voltage
3.0 1.5 2.1 2.1 V
OUT
= 0.1 V
4.5 2.25 3.15 3.15 V or V
CC
− 0.1 V
5.5 2.75 3.85 3.85
V
IL
Maximum Low Level
Input Voltage
3.0 1.5 0.9 0.9 V
OUT
= 0.1 V
4.5 2.25 1.35 1.35 V or V
CC
− 0.1 V
5.5 2.75 1.65 1.65
V
OH
Minimum High Level
Output Voltage
3.0 2.99 2.9 2.9
I
OUT
= −50 mA
4.5 4.49 4.4 4.4 V
5.5 5.49 5.4 5.4
V
*V
IN
= V
IL
or V
IH
3.0 2.56 2.46 −12 mA
4.5 3.86 3.76 I
OH
−24 mA
5.5 4.86 4.76 −24 mA
V
OL
Maximum Low Level
Output Voltage
3.0 0.002 0.1 0.1
I
OUT
= 50 mA
4.5 0.001 0.1 0.1 V
5.5 0.001 0.1 0.1
V
*V
IN
= V
IL
or V
IH
3.0 0.36 0.44 12 mA
4.5 0.36 0.44 I
OL
24 mA
5.5 0.36 0.44 24 mA
I
IN
Maximum Input
Leakage Current
5.5 ±0.1 ±1.0
mA
V
I
= V
CC
, GND
I
OLD
†Minimum Dynamic
Output Current
5.5 75 mA V
OLD
= 1.65 V Max
I
OHD
5.5 −75 mA V
OHD
= 3.85 V Min
I
CC
Maximum Quiescent Supply Current 5.5 8.0 80
mA
V
IN
= V
CC
or GND
* All outputs loaded; thresholds on input associated with output under test.
Maximum test duration 2.0 ms, one output loaded at a time.
NOTE: Note: I
IN
and I
CC
@ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V
CC
.

MC74AC574DTR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Flip Flops 2-6V CMOS Octal D-Type 3 State Out
Lifecycle:
New from this manufacturer.
Delivery:
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