OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

74HCT6323AD,118

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P22
Nexperia
74HC6323A; 74HCT6323A
Programmable ripple counter with oscillator; 3-state
25 °C -40 °C to
+85 °C
-40 °C to
+125 °C
Symbol Parameter Conditions
Min Typ Max Min Max Min Max
Unit
OUT; see Figure 5
[4]
V
CC
= 2.0 V - 14 60 - 75 - 90 ns
V
CC
= 4.5 V - 5 12 - 15 - 19 ns
t
t
transition
time
V
CC
= 6.0 V - 4 10 - 13 - 15 ns
X1 HIGH or LOW; see Figure 5
V
CC
= 2.0 V 50 17 - 60 - 75 - ns
V
CC
= 4.5 V 10 6 - 12 - 15 - ns
V
CC
= 6.0 V 9 5 - 10 - 13 - ns
MR LOW; see Figure 7
V
CC
= 2.0 V 80 22 - 100 - 120 - ns
V
CC
= 4.5 V 16 8 - 20 - 24 - ns
t
W
pulse width
V
CC
= 6.0 V 14 7 - 17 - 20 - ns
MR to X1; see Figure 7
V
CC
= 2.0 V 100 19 - 125 - 150 - ns
V
CC
= 4.5 V 20 7 - 25 - 30 - ns
t
rec
recovery
time
V
CC
= 6.0 V 17 6 - 21 - 26 - ns
X1; see Figure 5
V
CC
= 2.0 V 10 17 - 8 - 6.6 - MHz
V
CC
= 4.5 V 50 85 - 40 - 33 - MHz
V
CC
= 5.0 V; C
L
= 15 pF - 90 - - - - - MHz
f
max
maximum
frequency
V
CC
= 6.0 V 59 100 - 47 - 39 - MHz
An external clock is applied to X1
with: t
r
= t
f
≤ 6 ns, V
I
= GND to V
CC
,
MR = HIGH
[5]
divide by 1; S1 = GND; S2 = GND - 54 - - - - - pF
divide by 2; S1 = GND; S2 = V
CC
- 42 - - - - - pF
divide by 4; S1 = V
CC
; S2 = GND - 36 - - - - - pF
C
PD
power
dissipation
capacitance
divide by 8; S1 = V
CC
; S2 = V
CC
- 33 - - - - - pF
74HC_HCT6323A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved.
Product data sheet Rev. 4 — 9 July 2018
10 / 22
Nexperia
74HC6323A; 74HCT6323A
Programmable ripple counter with oscillator; 3-state
25 °C -40 °C to
+85 °C
-40 °C to
+125 °C
Symbol Parameter Conditions
Min Typ Max Min Max Min Max
Unit
74HCT6323A
X1 to OUT divide by 1;
S1 = GND; S2 = GND; see Figure 5
[1]
V
CC
= 4..5 V - 24 40 - 50 - 60 ns
V
CC
= 5.0 V; C
L
= 15 pF - 17 - - - - - ns
X1 to OUT divide by 2;
S1 = GND; S2 = V
CC
; see Figure 5
V
CC
= 4.5 V - 29 50 - 62 - 75 ns
X1 to OUT divide by 4;
S1 = V
CC
; S2 = GND; see Figure 5
V
CC
= 4.5 V - 35 60 - 75 - 90 ns
X1 to OUT divide by 8;
S1 = V
CC
; S2 = V
CC
; see Figure 5
t
pd
propagation
delay
V
CC
= 4.5 V - 40 70 - 87 - 105 ns
MR to OUT; see Figure 6t
PZL
OFF-state
to LOW
propagation
delay
V
CC
= 4.5 V - 16 30 - 37 - 45 ns
MR to OUT; see Figure 6
[2]
t
PZH
OFF-state
to HIGH
propagation
delay
V
CC
= 4.5 V - 22 38 - 47 - 57 ns
MR to OUT; see Figure 6
[3]
t
dis
disable time
V
CC
= 4.5 V - 21 35 - 43 - 52 ns
OUT; see Figure 5
[4]
t
t
transition
time
V
CC
= 4.5 V - 5 12 - 15 - 19 ns
X1 HIGH or LOW; see Figure 5
V
CC
= 4.5 V 10 6 - 12 - 15 - ns
MR LOW; see Figure 7
t
W
pulse width
V
CC
= 4.5 V 16 8 - 20 - 24 - ns
MR to X1; see Figure 7t
rec
recovery
time
V
CC
= 4.5 V 24 12 - 30 - 36 - ns
X1; see Figure 5
V
CC
= 4.5 V 50 85 - 40 - 33 - MHz
f
max
maximum
frequency
V
CC
= 5.0 V; C
L
= 15 pF - 90 - - - - - MHz
74HC_HCT6323A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved.
Product data sheet Rev. 4 — 9 July 2018
11 / 22
Nexperia
74HC6323A; 74HCT6323A
Programmable ripple counter with oscillator; 3-state
25 °C -40 °C to
+85 °C
-40 °C to
+125 °C
Symbol Parameter Conditions
Min Typ Max Min Max Min Max
Unit
An external clock is applied to X1
with: t
r
= t
f
≤ 6 ns, V
i
= GND to V
CC
,
MR = HIGH
[5]
divide by 1; S1 = GND; S2 = GND - 54 - - - - - pF
divide by 2; S1 = GND; S2 = V
CC
- 42 - - - - - pF
divide by 4; S1 = V
CC
; S2 = GND - 36 - - - - - pF
C
PD
power
dissipation
capacitance
divide by 8; S1 = V
CC
; S2 = V
CC
- 33 - - - - - pF
[1] t
pd
is the same as t
PHL
and t
PLH
.
[2] t
PZH
only applicable in the divide-by-1 mode and X1 must be HIGH.
[3] t
dis
is the same as t
PLZ
and t
PHZ
.
[4] t
t
is the same as t
THL
and t
TLH
.
[5] C
PD
is used to determine the dynamic power dissipation (P
D
in μW):
P
D
= C
PD
× V
CC
2
× f
i
+ (C
L
× V
CC
2
× f
o
) + (I
pull-up
× V
CC
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
I
pull-up
= pull-up currents in µA.
I
pull-up
is the summation of -I
I
(μA) of S1 and S2 inputs at the LOW state.
11.1 Waveforms and test circuit
t
PHL
V
M
t
THL
t
TLH
t
W
1/f max
t
PLH
OUT OUTPUT
X1 INPUT
90 %
10 %
V
I
GND
V
OH
V
OL
aaa-028600
V
M
Measurement points are given in Table 8
V
OL
and V
OH
are typical voltage output levels that occur with the output load.
Figure 5. The clock (X1) to output (OUT) propagation delays, the clock pulse width, the output transition times and
the maximum clock frequency.
74HC_HCT6323A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved.
Product data sheet Rev. 4 — 9 July 2018
12 / 22
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P22

74HCT6323AD,118

Mfr. #:
Buy 74HCT6323AD,118
Manufacturer:
Nexperia
Description:
Counter ICs PROGRAMBL RIPPLE
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet