MC100LVE164FAG

MC100LVE164
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Table 5. LVNECL DC CHARACTERISTICS V
CC
= 0.0 V; V
EE
= 3.3 V (Note 3)
Symbol Characteristic
40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
I
EE
Power Supply Current 34 45 34 45 37 45 mA
V
OH
Output HIGH Voltage (Note 4) 1085 1005 880 1025 955 880 1025 955 880 mV
V
OL
Output LOW Voltage (Note 4) 1830 1695 1555 1810 1705 1620 1810 1705 1620 mV
V
IH
Input HIGH Voltage (SingleEnded) 1165 880 1165 880 1165 880 mV
V
IL
Input LOW Voltage (SingleEnded) 1810 1475 1810 1475 1810 1475 mV
I
IH
Input HIGH Current 150 150 150 μA
I
IL
Input LOW Current 0.5 0.5 0.5 μA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
3. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary ±0.3 V.
4. Outputs are terminated through a 50 W resistor to V
CC
2.0 V.
Table 6. AC CHARACTERISTICS V
CC
= 3.3 V; V
EE
= 0.0 V or V
CC
= 0.0 V; V
EE
= 3.3 V (Note 5)
Symbol Characteristic
40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
f
max
Maximum Toggle Frequency 700
700 700
MHz
t
PLH
t
PHL
Propagation Delay A Input
to Output SEL0
SEL1
SEL2
SEL3
350
500
400
400
400
600
700
675
675
550
850
900
900
900
700
350
500
400
400
400
600
700
675
675
550
850
900
900
900
700
350
500
400
400
400
600
700
675
675
550
850
900
900
900
700
ps
t
SKEW
Within Device Skew (Note 6) 75 50 50 ps
t
JITTER
RMS Random Clock Jitter <1
<1 <1
ps
t
r
t
f
Rise/Fall Times (20% 80%) 275 400 550 275 400 550 275 400 550 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
5. V
EE
can vary ±0.3 V.
6. Within Device skew is defined as the difference in the A to Q delay between the 16 different A inputs.
MC100LVE164
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Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D Termination of ECL Logic Devices.)
Driver
Device
Receiver
Device
QD
Q D
Z
o
= 50 W
Z
o
= 50 W
50 W 50 W
V
TT
V
TT
= V
CC
2.0 V
Resource Reference of Application Notes
AN1405/D ECL Clock Distribution Techniques
AN1406/D Designing with PECL (ECL at +5.0 V)
AN1503/D
ECLinPSt I/O SPiCE Modeling Kit
AN1504/D Metastability and the ECLinPS Family
AN1568/D Interfacing Between LVDS and ECL
AN1672/D The ECL Translator Guide
AND8001/D Odd Number Counters Design
AND8002/D Marking and Date Codes
AND8020/D Termination of ECL Logic Devices
AND8066/D Interfacing with ECLinPS
AND8090/D AC Characteristics of ECL Devices
MC100LVE164
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ORDERING INFORMATION
Device Package Shipping
MC100LVE164FA LQFP 250 Units / Rail
MC100LVE164FAG LQFP
(PbFree)
250 Units / Rail
MC100LVE164FAR2 LQFP 2000 / Tape & Reel
MC100LVE164FAR2G LQFP
(PbFree)
2000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.

MC100LVE164FAG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Encoders, Decoders, Multiplexers & Demultiplexers 3.3V ECL 16:1 Mux
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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