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74LVTH16245MEA

P1-P3P4-P6P7-P8
© 2005 Fairchild Semiconductor Corporation DS500152 www.fairchildsemi.com
January 1999
Revised June 2005
74LVT16245 • 74LVTH16245 Low Voltage 16-Bit Transceiver with 3-STATE Outputs
74LVT16245 • 74LVTH16245
Low Voltage 16-Bit Transceiver with 3-STATE Outputs
General Description
The LVT16245 and LVTH16245 contain sixteen non-invert-
ing bidirectional buffers with 3-STATE outputs and is
intended for bus oriented applications. The device is byte
controlled. Each byte has separate control inputs which
can be shorted together for full 16-bit operation. The T/R
inputs determine the direction of data flow through the
device. The OE
inputs disable both the A and B ports by
placing them in a high impedance state.
The LVTH16245 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These non-inverting transceivers are designed for low-volt-
age (3.3V) V
CC
applications, but with the capability to pro-
vide a TTL interface to a 5V environment. The LVT16245
and LVTH16245 are fabricated with an advanced BiCMOS
technology to achieve high speed operation similar to 5V
ABT while maintaining low power dissipation.
Features
■ Input and output interface capability to systems at
5V V
CC
■ Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH16245),
also available without bushold feature (74LVT16245).
■ Live insertion/extraction permitted
■ Power Up/Down high impedance provides glitch-free
bus loading
■ Outputs source/sink 32 mA/ 64 mA
■ Functionally compatible with the 74 series 16245
■ Latch-up performance exceeds 500 mA
■ ESD performance:
Human-body model 2000V
Machine model
200V
Charged-device 1000V
■ Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA) (Preliminary)
Ordering Code:
Note 1: BGA package available in Tape and Reel only.
Note 2: Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Order Number
Package
Number
Package Description
74LVT16245GX
(Note 1)
BGA54A
(Preliminary)
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
[Tape and Reel]
74LVT16245MEA
(Note 2)
MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
74LVT16245MTD
(Note 2)
MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
74LVTH16245GX
(Note 1)
BGA54A
(Preliminary)
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
[Tape and Reel]
74LVTH16245MEA
(Note 2)
MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
74LVTH16245MTD
(Note 2)
MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
www.fairchildsemi.com 2
74LVT16245 • 74LVTH16245
Connection Diagrams
Pin Assignment for SSOP and TSSOP
Pin Assignment for FBGA
(Top Thru View)
Pin Descriptions
FBGA Pin Assignments
Truth Tables
H HIGH Voltage Level
L
LOW Voltage Level
X
Immaterial
Z
High Impedance
Pin Names Description
OE
n
Output Enable Input (Active LOW)
T/R
n
Transmit/Receive Input
A
0
–A
15
Side A Inputs/3-STATE Outputs
B
0
–B
15
Side B Inputs/3-STATE Outputs
NC No Connect
123456
A B
0
NC T/R
1
OE
1
NC A
0
B B
2
B
1
NC NC A
1
A
2
C B
4
B
3
V
CC
V
CC
A
3
A
4
D B
6
B
5
GND GND A
5
A
6
E B
8
B
7
GND GND A
7
A
8
F B
10
B
9
GND GND A
9
A
10
G B
12
B
11
V
CC
V
CC
A
11
A
12
H B
14
B
13
NC NC A
13
A
14
J B
15
NC T/R
2
OE
2
NC A
15
Inputs
Outputs
OE
1
T/R
1
L L Bus B
0
–B
7
Data to Bus A
0
–A
7
L H Bus A
0
–A
7
Data to Bus B
0
–B
7
H X HIGH–Z State on A
0
–A
7
,B
0
–B
7
Inputs
Outputs
OE
2
T/R
2
L L Bus B
8
–B
15
Data to Bus A
8
–A
15
L H Bus A
8
–A
15
Data to Bus B
8
–B
15
H X HIGH–Z State on A
8
–A
15
,B
8
–B
15
3 www.fairchildsemi.com
74LVT16245 • 74LVTH16245
Functional Description
The LVT16245 and LVTH16245 contain sixteen non-inverting bidirectional buffers with 3-STATE outputs. The device is byte
controlled with each byte functioning identically, but independent of the other. The control pins can be shorted together to
obtain full 16-bit operation.
Logic Diagrams
Note: Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays.
P1-P3P4-P6P7-P8

74LVTH16245MEA

Mfr. #:
Buy 74LVTH16245MEA
Manufacturer:
ON Semiconductor / Fairchild
Description:
Bus Transceivers 16-Bit Transceiver
Lifecycle:
New from this manufacturer.
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