PRODUCT SPECIFICATION FAN2508/FAN2509
4
REV. 1.0.6 2/14/03
Thermal Characteristics
The FAN2508/09 is designed to supply 50mA at the
specified output voltage with an operating die (junction)
temperature of up to 125°C. Once the power dissipation and
thermal resistance is known, the maximum junction
temperature of the device can be calculated. While the power
dissipation is calculated from known electrical parameters,
the thermal resistance is a result of the thermal characteris-
tics of the compact SOT23-5 surface-mount package and the
surrounding PC Board copper to which it is mounted.
The power dissipation is equal to the product of the input-to-
output voltage differential and the output current plus the
ground current multiplied by the input voltage, or:
The ground pin current I
GND
can be found in the charts
provided in the Electrical Characteristics section.
The relationship describing the thermal behavior of the
package is:
where T
J(max)
is the maximum allowable junction tempera-
ture of the die, which is 125°C, and T
A
is the ambient operat-
ing temperature.
θ
JA
is dependent on the surrounding PC
board layout and can be empirically obtained. While the
θ
JC
(junction-to-case) of the SOT23-5 package is specified at
130°C /W, the
θ
JA
of the minimum PWB footprint will be at
least 235°C /W. This can be improved upon by providing a
heat sink of surrounding copper ground on the PWB.
Depending on the size of the copper area, the resulting
θ
JA
can range from approximately 180°C /W for one square inch
to nearly 130°C /W for 4 square inches. The addition of
backside copper with through-holes, stiffeners, and other
enhancements can also aid in reducing this value. The heat
contributed by the dissipation of other devices located
nearby must be included in design considerations.
Once the limiting parameters in these two relationships have
been determined, the design can be modified to ensure that
the device remains within specified operating conditions.
If overload conditions are not considered, it is possible for
the device to enter a thermal cycling loop, in which the
circuit enters a shutdown condition, cools, re-enables, and
then again overheats and shuts down repeatedly due to an
unmanaged fault condition.
Operation of Adjustable Version
The adjustable version of the FAN2508/09 includes an input
pin ADJ which allows the user to select an output voltage
ranging from 1.8V to near V
IN
, using an external resistor
divider. The voltage V
ADJ
presented to the ADJ pin is fed to
the onboard error amplifier which adjusts the output voltage
until V
ADJ
is equal to the onboard bandgap reference voltage
of 1.32V(typ). The equation is:
The total value of the resistor chain should not exceed
250K
Ω
total to keep the error amplifier biased during
no-load conditions. Programming output voltages very near
V
IN
need to allow for the magnitude and variation of the
dropout voltage V
DO
over load, supply, and temperature
variations. Note that the low-leakage FET input to the
CMOS Error Amplifier induces no bias current error to the
calculation.
General PWB Layout Considerations
To achieve the full performance of the device, careful circuit
layout and grounding technique must be observed. Establish-
ing a small local ground, to which the GND pin, the output
and bypass capacitors are connected, is recommended, while
the input capacitor should be grounded to the main ground
plane. The quiet local ground is then routed back to the main
ground plane using feedthrough vias. In general, the high-
frequency compensation components (input, bypass, and
output capacitors) should be located as close to the device as
possible. The proximity of the output capacitor is especially
important to achieve optimal noise compensation from the
onboard error amplifier, especially during high load condi-
tions. A large copper area in the local ground will provide the
heat sinking discussed above when high power dissipation
significantly increases the temperature of the device.
Component-side copper provides significantly better thermal
performance for this surface-mount device, compared to that
obtained when using only copper planes on the underside.
P
D
V
IN
V
OUT
–()I
OUT
V
IN
I
GND
+=
P
D max()
T
J max()
T
A
–
θ
JA
-------------------------------
=
V
OUT
1.32V 1
R
upper
R
lower
----------------+×=
