NCV4299C
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13
APPLICATION DESCRIPTION
NCV4299C
The NCV4299C is a family of precision micropower
voltage regulators with an output current capability of
150 mA at 5.0 V and 3.3 V.
The output voltage is accurate within "2% with a
maximum dropout voltage of 0.5 V at 100 mA. Low
quiescent current is a feature drawing only 80 mA with a
100 mA load. This part is ideal for any and all battery
operated microprocessor equipment.
Microprocessor control logic includes an active reset
output RO (with delay), and a SI/SO monitor which can be
used to provide an early warning signal to the
microprocessor of a potential impending reset signal. The
use of the SI/SO monitor allows the microprocessor to finish
any signal processing before the reset shuts the
microprocessor down. Internal output resistors on the RO
and SO pins pulling up to the output pin Q reduce external
component count. An inhibit function is available on the
14−lead part. With inhibit active, the regulator turns off and
the device consumes less that 1.0 mA of quiescent current.
The active reset circuit operates correctly at an output
voltage as low as 1.0 V. The reset function is activated
during the powerup sequence or during normal operation if
the output voltage drops outside the regulation limits.
The reset threshold voltage can be decreased by the
connection of an external resistor divider to the RADJ lead.
The regulator is protected against reverse battery, short
circuit, and thermal overload conditions. The device can
withstand load dump transients making it suitable for use in
automotive environments.
NCV4299C Circuit Description
The low dropout regulator in the NCV4299C uses a PNP
pass transistor to give the lowest possible dropout voltage
capability. The current is internally monitored to prevent
oversaturation of the device and to limit current during over
current conditions. Additional circuitry is provided to
protect the device during overtemperature operation.
The regulator provides an output regulated to 2%.
Other features of the regulator include an undervoltage
reset function and a sense circuit. The reset function has an
adjustable time delay and an adjustable threshold level. The
sense circuit trip level is adjustable and can be used as an
early warning signal to the controller. An inhibit function
that turns off the regulator and reduces the current
consumption to less than 1.0 mA is a feature available in the
14 pin package.
Output Regulator
The output is controlled by a precision trimmed reference.
The PNP output has saturation control for regulation while
the input voltage is low, preventing oversaturation. Current
limit and voltage monitors complement the regulator design
to give safe operating signals to the processor and control
circuits.
Stability Considerations
The input capacitor C
I
is necessary for compensating
input line reactance. Possible oscillations caused by input
inductance and input capacitance can be damped by using a
resistor of approximately 1.0 W in series with C
I
.
The output or compensation capacitor helps determine
three main characteristics of a linear regulator: startup delay,
load transient response and loop stability.
The capacitor value and type should be based on cost,
availability, size and temperature constraints. A tantalum or
aluminum electrolytic capacitor is best, since a film or
ceramic capacitor with almost zero ESR can cause
instability. The aluminum electrolytic capacitor is the least
expensive solution, but, if the circuit operates at low
temperatures (−25°C to −40°C), both the value and ESR of
the capacitor will vary considerably. The capacitor
manufacturers data sheet usually provides this information.
The value for the output capacitor C
Q
shown in Figure 34
should work for most applications, however, it is not
necessarily the optimized solution. Stability is guaranteed at
values C
Q
22 mF and an ESR 4 W within the operating
temperature range. Actual limits are shown in a graph in the
typical performance characteristics section.
NCV4299C
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NCV4299C
I
D
SO
Q
SI
RO
GND
V
BAT
Figure 34. Test and Application Circuit Showing all Compensation and Sense Elements
0.1 mF
C
I
*
C
D
R
RADJ1
R
RADJ2
R
S11
R
S12
C
Q
**
22 mF
V
DD
Microprocessor
I/O
I/O
*C
I
required if regulator is located far from the power supply filter.
**C
Q
required for stability. Cap must operate at minimum temperature expected.
***This RC filter is only required when transients with slew rate in excess of 10 V/ms may be present on the INH
voltage source during operation. The filter is not required when INH is connected to a noise−free DC voltage.
RADJ
INH
INH
C
INH
***
0.01 mF
R
INH
***
51kW
NCV4299C
I
D
SO
Q
SI
RO
GND
V
BAT
Figure 35. Test and Application Circuit Showing all Compensation and Sense Elements for 8 Pin Package Part
0.1 mF
C
I
*
C
D
R
RADJ1
R
RADJ2
R
S11
R
S12
C
Q
**
22 mF
V
DD
Microprocessor
I/O
I/O
*C
I
required if regulator is located far from the power supply filter.
**C
Q
required for stability. Cap must operate at minimum temperature expected.
RADJ
NCV4299C
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15
Reset Output (RO)
A reset signal, Reset Output (RO, low voltage) is
generated as the IC powers up. After the output voltage V
Q
increases above the reset threshold voltage V
RT
, the delay
timer D is started. When the voltage on the delay timer V
D
passes V
UD
, the reset signal RO goes high. D pin voltage in
steady state is typically 2.5 V. A discharge of the delay timer
(V
D
) is started when V
Q
drops and stays below the reset
threshold voltage V
RT
. When the voltage of the delay timer
(V
D
) drops below the lower threshold voltage V
LD
, the reset
output voltage V
RO
is brought low to reset the processor.
The reset output RO is an open collector NPN transistor,
controlled by a low voltage detection circuit. The circuit is
functionally independent of the rest of the IC, thereby
guaranteeing that RO is valid for V
Q
as low as 1.0 V.
Figure 36. Reset Timing Diagram
V
I
V
Q
V
D
V
LD
V
RT
V
RO,SAT
V
RO
t
t
< t
RR
dV
dt
+
I
D
C
D
V
UD
t
Power−on−Reset Thermal
Shutdown
Voltage Dip
at Input
Undervoltage Secondary
Spike
Overload
at Output
t
t
RR
t
d
Reset Adjust (RADJ)
The reset threshold V
RT
can be decreased from a typical
value of 4.67 V to as low as 3.5 V by using an external
voltage divider connected from the Q lead to the pin RADJ,
as shown in Figure 34. The resistor divider keeps the voltage
above the V
RADJ,TH
, (typ. 1.36 V), for the desired input
voltages and overrides the internal threshold detector.
Adjust the voltage divider according to the following
relationship:
V
THRES
+ V
RADJ,TH
·(R
ADJ1
) R
ADJ2
)ńR
ADJ2
(eq. 1)
If the reset adjust option is not needed, the RADJ−pin
should be connected to GND causing the reset threshold to
go to its default value (typ. 4.67 V).
Reset Delay (D)
The reset delay circuit provides a delay (programmable by
capacitor C
D
) on the reset output RO lead. The delay lead D
provides charge current I
D
(typically 7.1 mA) to the external
delay capacitor C
D
during the following times:
1. During Powerup (once the regulation threshold has
been exceeded).
2. After a reset event has occurred and the device
is back in regulation. The delay capacitor is
set to discharge when the regulation (V
RT
, reset
threshold voltage) has been violated. When
the delay capacitor discharges to down to V
LD
,
the reset signal RO pulls low.

NCV4299CD150R2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
LDO Voltage Regulators 5.0V 150MA LDO
Lifecycle:
New from this manufacturer.
Delivery:
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