LT1796CN8#PBF

LT1796
4
1796fa
For more information www.linear.com/LT1796
Dominant State Bus Voltage
vs R
L
Supply Current vs Data Rate
Transmitting, 50% Duty Cycle
R
L
(Ω)
0
V
OD
(V)
3.0
2.5
2.0
1.5
1.0
0.5
0
50 100 150 200
1796 G01
250
T
A
= 25°C
DATA RATE (Kbps)
0
SUPPLY CURRENT (mA)
22
23
200
1796 G03
21
20
50
100
150
250
24
T
A
= 25°C
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
swiTching characTerisTics
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
t
BIT
Minimum Bit Time (Note 3)
l
8 µs
F
MAX
Maximum Data Rate (Note 3)
l
125 kbps
t
TXDON
Driver Input to Bus Active Figures 1, 2 R
S
= 0k
l
300 500 ns
R
S
= 47k
l
350 1000 ns
t
TXDOFF
Driver Input to Bus Inactive Figures 1, 2 R
S
= 0k
l
500 1200 ns
R
S
= 47k
l
600 1500 ns
t
LBON
Loopback Delay Active Figures 1, 3
l
0.6 1.5 µs
t
LBOFF
Loopback Delay Inactive Figures 1, 3
l
1.5 3 µs
t
RXDOFF
Receiver Delay Off Figures 1, 4
l
400 600 ns
t
RXDON
Receiver Delay On Figures 1, 4
l
300 600 ns
t
RXDOFFSB
Receiver Delay Off, Standby V
RS
= 4V, Figures 1, 4
l
1.5 4 µs
t
RXDONSB
Receiver Delay On, Standby V
RS
= 4V, Figures 1, 4
l
1 4 µs
t
WAKE
Wake-Up Delay from Standby Figures 1, 5
l
1 15 µs
SR
+
Positive Slew Rate R
S
= 0k
R
S
= 47k
l
l
5
2
12
7
65
30
V/µs
V/µs
SR
Negative Slew Rate R
S
= 0k
R
S
= 47k
l
l
5
2
36
5
65
15
V/µs
V/µs
The l denotes the specifications which apply over the full operating
temperature range. V
RS
= 0V unless otherwise noted. (Note 2)
Note 2: Unless otherwise specified, testing done at V
CC
= 5V, T
A
= 25°C.
Note 3: Bit time and data rate specifications are guaranteed by driver and
receiver delay time measurements.
Typical perForMance characTerisTics
LT1796
5
1796fa
For more information www.linear.com/LT1796
R
S
Pin Current vs R
S
Positive Slew Rate vs R
S
Negative Slew Rate vs R
S
Transmitter Propagation Delay vs
Temperature
CANH Short-Circuit Current vs
Voltage
CANL Short-Circuit Current vs
Voltage
V
CANL
(V)
I
SC
(mA)
90
80
70
60
50
40
30
20
10
0
–10
1796 G09
60
40
20 0 20 40
60
T
A
= 25°C
R
S
(kΩ)
0
200
150
100
50
0
20
40
60
T
A
= 25°C
R
S
(kΩ)
80
1796 G05
20
40
60
0
SR
+
(V/µs)
10
15
5
0
T
A
= 25°C
R
S
(kΩ)
0
SR
(V/s)
20
30
80
1796 G06
10
0
20
40
60
40
T
A
= 25°C
TEMPERATURE (°C)
t
TXDOFF
AND t
TXDON
(ns)
700
600
500
400
300
200
100
0
1796 G07
50
25
0 25 50 75
100
t
TXDOFF
t
TXDON
V
CANH
(V)
I
SC
(mA)
20
0
20
40
60
80
–100
–120
1796 G08
60
40
20 0 20 40
60
T
A
= 25°C
Typical perForMance characTerisTics
Receiver Thresholds vs
Temperature
Receiver Propagation Delay vs
Temperature
TEMPERATURE (°C)
–50
V
TH
(V)
0.80
0.75
0.70
0.65
0.60
–25 0 25 50
1796 G10
75
100
V
TH
RISING
V
TH
FALLING
TEMPERATURE (°C)
t
RXDOFF
AND t
RXDON
(ns)
400
350
300
250
200
1796 G11
50
25
0 25 50 75
100
t
RXDOFF
t
RXDON
LT1796
6
1796fa
For more information www.linear.com/LT1796
pin FuncTions
TXD (Pin 1): Driver Input. Logic-level thresholds are set
by V
REF
. A logic input level higher than V
REF
turns the
driver outputs off, releasing control of the CANH and
CANL lines. A logic input less than V
REF
turns the driver
outputs on, pulling CANH high and CANL low. An open
TXD input will float high, turning the driver outputs off.
The TXD input pin can withstand voltages from –0.3V to
44V with no damage.
GND (Pin 2): Ground.
V
CC
(Pin 3): Positive Supply Input. Normal operation is
with a 4.75V to 5.25V supply. Operation with supplies up
to 44V is possible with unterminated bus lines. Operation
at high voltages with normally terminated busses will
result in excessive power dissipation and activation of the
thermal shutdown circuit. V
CC
should be decoupled with
a 0.1µF low ESR capacitor placed as close to the supply
pin as possible.
RXD (Pin 4): Receiver TTL Level-Logic Output. A high level
output indicates a recessive state (zero-volt differential)
bus. A dominant state forces a low receiver output.
V
REF
(Pin 5): Reference Output. The reference voltage sets
the TXD input threshold and the recessive bus common
mode voltage at CANH and CANL. V
REF
is approximately
V
CC
/2 for low voltage operation. When V
CC
> 7.5V, V
REF
maintains a 3.5V level.
CANL (Pin 6): CAN Bus Low Data Line. The CANL pin is
one input to the receiver and the low driver output. In the
dominant state (TXD low), the driver pulls the CANL pin
to within 1V of GND. In the recessive state (TXD high),
the driver output stays high impedance. The CANL pin is
protected from voltage faults from –60V to 60V in domi
-
nant, recessive, standby or powered off modes. On-chip
ESD protection meets IEC-1000-4-2 levels.
CANH
(Pin 7): CAN Bus High Data Line. The CANH pin
is one input to the receiver and the high driver output. In
the dominant state (TXD low), the driver pulls the CANH
pin to within 1V of V
CC
. In the recessive state (TXD high),
the driver output stays high impedance. The CANH pin is
protected from voltage faults from –60V to 60V in domi
-
nant, recessive, standby or powered off modes. On-chip
ESD protection meets IEC-1000-4-2 levels.
R
S
(Pin 8): Slope Control. This pin is a multifunction
control pin. When R
S
is high (V
RS
> 4V), the circuit goes
into a low power standby mode. In standby, the driver
always stays in a high impedance (recessive) state. The
receiver operates in a low power (slow) monitoring mode.
Received data may be used to “wake-up” the system to full
functionality. Full speed normal operation occurs if R
S
is
tied low through a resistance of less than 3k. The current
out of R
S
will be limited to about 500µA in the low state.
Controlling the current out of R
S
with a resistor greater
than 3k or by using a current source allows slew rate
control of the data output onto CANH and CANL.

LT1796CN8#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
CAN Interface IC Overvoltage Fault Protected CAN Tran
Lifecycle:
New from this manufacturer.
Delivery:
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