74ABT373 Octal Transparent Latch with 3-STATE Outputs
©1993 Fairchild Semiconductor Corporation www.fairchildsemi.com
74ABT373 Rev. 1.4 7
Skew
SOIC package.
Notes:
11. This specification is guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors
in place of the 50pF load capacitors in the standard AC load.
12. This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described
switching in phase (i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.).
13. Skew is defined as the absolute value of the difference between the actual propagation delays for any two separate
outputs of the same device. The specification applies to any outputs switching HIGH-to-LOW (t
OSHL
), LOW-to-HIGH
(t
OSLH
), or any combination switching LOW-to-HIGH and/or HIGH-to-LOW (t
OST
). This specification is guaranteed
but not tested.
14. Propagation delay variation is for a given set of conditions (i.e., temperature and V
CC
) from device to device. This
specification is guaranteed but not tested.
15. This describes the difference between the delay of the LOW-to-HIGH and the HIGH-to-LOW transition on the same
pin. It is measured across all the outputs (drivers) on the same chip, the worst (largest delta) number is the
guaranteed specification. This specification is guaranteed but not tested.
Capacitance
Note:
16. C
OUT
is measured at frequency f = 1MHz, per MIL-STD-883, Method 3012.
Symbol Parameter
T
A
= –40°C to +85°C,
V
CC
= 4.5V–5.5V,
C
L
= 50pF,
8 Outputs Switching
(11)
T
A
= –40°C to +85°C,
V
CC
= 4.5V–5.5V,
C
L
= 250pF,
8 Outputs Switching
(12)
UnitsMax. Max.
t
OSHL
(13)
Pin to Pin Skew,
HL Transitions
1.0 1.5 ns
t
OSLH
(13)
Pin to Pin Skew,
LH Transitions
1.0 1.5 ns
t
PS
(15)
Duty Cycle, LH–HL Skew 1.4 3.5 ns
t
OST
(13)
Pin to Pin Skew,
LH/HL Transitions
1.5 3.9 ns
t
PV
(14)
Device to Device Skew,
LH/HL Transitions
2.0 4.0 ns
Symbol Parameter
Conditions
T
A
= 25°C Typ. Units
C
IN
Input Capacitance V
CC
= 0V 5 pF
C
OUT
(16)
Output Capacitance V
CC
= 5.0V 9 pF
