ISL29035
7
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Principles of Operation
Photodiodes and ADC
The ISL29035 contains two photodiode arrays, which convert
light into current. The spectral response for ambient light sensing
is shown in Figure 6 on page 6
. After light is converted to current
during the light signal process, the current output is converted to
digital by a built-in 16-bit Analog-to-Digital Converter (ADC). An
I
2
C command reads the ambient light or IR intensity in counts.
The converter is a charge-balancing integrating type 16-bit ADC.
The chosen method for conversion is best for converting small
current signals in the presence of an AC periodic noise. A 105ms
integration time, for instance, highly rejects 50Hz and 60Hz
power line noise simultaneously.
The integration time of the built-in ADC is determined by the
internal oscillator, and the n-bit (n = 4, 8, 12, 16) counter inside
the ADC. A good balancing act of integration time and resolution
(depending on the application) is required for optimal results.
The ADC has I
2
C programmable range select to dynamically
accommodate various lighting conditions. For very dim
conditions, the ADC can be configured at its lowest range
(Range 0) in the ambient light sensing.
Low-Power Operation
The ISL29035 initial operation is at the power-down mode after a
supply voltage is provided. The data registers contain the default
value of 0. When the ISL29035 receives an I
2
C command to do a
one-time measurement from an I
2
C master, it will start ADC
conversion with light sensing. The ISL29035 will go to the
power-down mode automatically after one conversion is finished
and keep the conversion data available for the master to fetch
anytime afterwards. When receiving an I
2
C command of
continuous measurement, the device will continuously do ADC
conversions with light sensing and will continuously update the
data registers with the latest conversion data. The device will go
into power-down mode after receiving the power-down I
2
C
command.
Ambient Light and IR Sensing
There are four operational modes in ISL29035: Programmable
ALS once with auto power-down, programmable IR sensing once
with auto power-down, programmable continuous ALS sensing
and programmable continuous IR sensing. These four modes can
be programmed in series to fulfill the application needs. The
detailed program configuration is listed in
Command-I Register
(Address: 0x00)” on page 10.
When the part is programmed for ambient light sensing, the
ambient light wavelength within the “Ambient Light Sensing”
spectral response curve in Figure 15
is converted into current.
With ADC, the current is converted to an unsigned n-bit (up to 16
bits) digital output.
When the part is programmed for Infrared (IR) sensing, the IR
light wavelength within the “IR Sensing” spectral response curve
in Figure 15 is converted into current. With ADC, the current is
converted to an unsigned n-bit (up to 16 bits) digital output.
Interrupt Function
The active low interrupt pin is an open-drain pull-down
configuration. The interrupt pin serves as an alarm or monitoring
function to determine whether the ambient light level exceeds
the upper threshold or goes below the lower threshold. It should
be noted that the function of ADC conversion continues without
stopping after interrupt is asserted. If the user needs to read the
ADC count that triggers the interrupt, the reading should be done
before the data registers are refreshed by the following
conversions. The user can also configure the persistence of the
interrupt pin. This reduces the possibility of false triggers, such as
noise or sudden spikes in ambient light conditions. An
unexpected camera flash, for example, can be ignored by setting
the persistence to 8 integration cycles.
Serial Interface
The ISL29035 supports the Inter-Integrated Circuit (I
2
C) bus data
transmission protocol. The I
2
C bus is a two-wire serial
bidirectional interface consisting of SCL (Clock) and SDA (Data).
Both the wires are connected to the device supply via pull-up
resistors. The I
2
C protocol defines any device that sends data
onto the bus as a transmitter and the receiving device as the
receiver. The device controlling the transfer is a master and the
device being controlled is the slave. The transmitting device pulls
down the SDA line to transmit a “0” and releases it to transmit a
“1”. The master always initiates the data transfer, only when the
bus is not busy, and provides the clock for both transmitting and
receiving operations. The ISL29035 operates as a slave device in
all applications. The serial communication over the I
2
C interface
is conducted by sending the Most Significant Bit (MSB) of each
byte of data first.
Start Condition
During data transfer, the SDA line must remain stable while the
SCL line is HIGH. All I
2
C interface operations must begin with a
START condition, which is a HIGH to LOW transition of SDA while
SCL is HIGH (refer to Figure 12 on page 8
). The ISL29035
continuously monitors the SDA and SCL lines for the START
condition and does not respond to any command until this
condition is met (refer to Figure 12
). A START condition is ignored
during the power-up sequence.
Stop Condition
All I
2
C interface operations must be terminated by a STOP
condition, which is a LOW to HIGH transition of SDA while SCL is
HIGH (refer to Figure 12
). A STOP condition at the end of a
read/write operation places the device in its standby mode. If a
stop is issued in the middle of a Data byte, or before 1 full Data
byte + ACK is sent, then the serial communication of the
ISL29035 resets itself without performing the read/write. The
contents of the array are not affected.
Acknowledge
An Acknowledge (ACK) is a software convention used to indicate
a successful data transfer. The transmitting device releases the
SDA bus after transmitting 8 bits. During the ninth clock cycle,
the receiver pulls the SDA line LOW to acknowledge the reception
of the 8 bits of data (refer to Figure 12
). The ISL29035 responds
with an ACK after recognition of a START condition followed by a
ISL29035
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valid Identification Byte, and once again, after successful receipt
of an Address Byte. The ISL29035 also responds with an ACK
after receiving a Data byte of a write operation. The master must
respond with an ACK after receiving a Data byte of a read
operation.
Device Addressing
Following a START condition, the master must output a Device
Address byte. The 7 MSBs of the Device Address byte are known
as the device identifier. The device identifier bits of the ISL29035
are internally hard-wired as “1000100”. The LSB of the Device
Address byte is defined as a Read or Write (R/W
) bit. When this
R/W bit is a “1”, a read operation is selected and when “0”, a write
operation is selected (refer to Figure 10). The master generates a
START condition followed by Device Address byte 1000100x (x as
R/W
) and the ISL29035 compares it with the internal device
identifier. Upon a correct comparison, the device outputs an
acknowledge (LOW) on the SDA line (refer to Figure 12
).
Write Operation
BYTE WRITE
In a byte write operation, the ISL29035 requires the Device
Address byte, Register Address byte and the Data byte. The
master starts the communication with a START condition. Upon
receipt of the Device Address byte, Register Address byte and the
Data byte, the ISL29035 responds with an Acknowledge (ACK).
Following the ISL29035 data acknowledge response, the master
terminates the transfer by generating a STOP condition. The
ISL29035 then begins an internal write cycle of the data to the
volatile memory. During the internal write cycle, the device inputs
are disabled and the SDA line is in a high impedance state, so
the device will not respond to any requests from the master (refer
to Figure 11
).
BURST WRITE
The ISL29035 has a burst write operation, which allows the
master to write multiple consecutive bytes from a specific
address location. It is initiated in the same manner as the byte
write operation, but instead of terminating the write cycle after
the first Data byte is transferred, the master can write to the
whole register array. After the receipt of each byte, the ISL29035
responds with an acknowledge, and the address is internally
incremented by one. The address pointer remains at the last
address byte written. When the counter reaches the end of the
register address list, it “rolls over” and goes back to the first
Register Address.
FIGURE 10. DEVICE ADDRESS, REGISTER ADDRESS AND DATA BYTE
DEVICE
ADDRESS BYTE
REGISTER
ADDRESS BYTE
DATA BYTE
1 0 0 0 1 0 0
R/W
A7 A6 A5 A4 A3 A2 A1 A0
D7 D6 D5 D4 D3 D2 D1 D0
FIGURE 11. BYTE WRITE SEQUENCE
10001000
A
C
K
A
C
K
A
C
K
S
T
O
P
S
T
A
R
T
DEVICE ADDRESS
BYTE
ADDRESS BYTE DATA BYTE
SIGNAL FROM
MASTER DEVICE
SIGNAL AT SDA
SIGNALS FROM
SLAVE DEVICE
FIGURE 12. START, DATA STABLE, ACKNOWLEDGE AND STOP CONDITION
SDA FROM
RECEIVER
SDA FROM
TRANSMITTER
SCL FROM
MASTER
START
DATA
CHANGE
DATA
STABLE
DATA
STABLE
ACK
STOP
8
th
CLK
9
th
CLK
HIGH
IMPEDANCE
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Read Operation
The ISL29035 has two basic read operations: Byte Read and
Burst Read.
BYTE READ
Byte read operations allow the master to access any register
location in the ISL29035. The Byte read operation is a two step
process. The master issues the START condition and the Device
Address byte with the R/W
bit set to “0”, receives an
acknowledge, then issues the Register Address byte. After
acknowledging receipt of the register address byte, the master
immediately issues another START condition and the Device
Address byte with the R/W
bit set to “1”. This is followed by an
acknowledge from the device and then by the 8-bit data word.
The master terminates the read operation by not responding with
an acknowledge and then issuing a stop condition (refer to
Figure 13
).
BURST READ
Burst read operation is identical to the Byte Read operation.
After the first Data byte is transmitted, the master now responds
with an acknowledge, indicating it requires additional data. The
device continues to output data for each acknowledge received.
The master terminates the read operation by not responding with
an acknowledge but issuing a STOP condition (refer to
Figure 14
).
For more information about the I
2
C standard, please consult the
Phillips
I
2
C specification documents.
Power-On Reset
The Power-On Reset (POR) circuitry protects the internal logic
against powering up in the incorrect state. The ISL29035 will
power up into Standby mode after V
DD
exceeds the POR trigger
level and will power down into Reset mode when V
DD
drops
below the POR trigger level. This bidirectional POR feature
protects the device against ‘brown-out’ failure following a
temporary loss of power.
The POR is an important feature because it prevents the
ISL29035 from starting to operate with insufficient voltage, prior
to stabilization of the internal bandgap. The ISL29035 prevents
communication to its registers and greatly reduces the likelihood
of data corruption on power-up.
10001000
A
C
K
A
C
K
S
T
A
R
T
DEVICE ADDRESS
WRITE
ADDRESS BYTE
SIGNAL FROM
MASTER DEVICE
SIGNAL AT SDA
SIGNALS FROM
SLAVE DEVICE
A
C
K
S
T
O
P
DEVICE ADDRESS
READ
DATA BYTE
S
T
A
R
T
10001001
FIGURE 13. BYTE ADDRESS READ SEQUENCE
FIGURE 14. BURST READ SEQUENCE
10001000
A
C
K
A
C
K
S
T
A
R
T
DEVICE ADDRESS
WRITE
ADDRESS BYTE
SIGNAL FROM
MASTER DEVICE
SIGNAL AT SDA
SIGNALS FROM
SLAVE DEVICE
A
C
K
S
T
O
P
DEVICE
ADDRESS READ
DATA BYTE 1
S
T
A
R
T
10001001
A
C
K
DATA BYTE 2
A
C
K
DATA BYTE n
[(n) is any integer
greater than 1]

ISL29035IROZ-T7A

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Light to Digital Converters ISL29035IROZ Pb-Free Integrated Digital Light Sensor with In
Lifecycle:
New from this manufacturer.
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