FAN5235QSC Datasheet FAN5235QSCX, FAN5235QSC | P7-P9

FAN5235

REV. 1.3.3 1/3/02

Figure 3. FAN5235 5V/3.3V—ALWAYS Internal Block Diagram

Functional Description

The FAN5235 is a high efﬁciency and high precision DC/DC

controller for notebook and other portable applications. It

provides all of the voltages necessary for system electronics:

5V, 3.3V, 12V, and both 3.3V-ALWAYS and 5V-ALWAYS.

Utilization of both input and output voltage feedback in a

current-mode control allows for fast loop response over a

wide range of input and output variations. Current sense

based on MOSFET R

DS,on

gives maximum efﬁciency, while

also permitting the use of a sense resistor for high accuracy.

3.3V and 5V Architecture

The 3.3V and 5V switching regulator outputs of the

FAN5235 are generated from the unregulated input voltage

using synchronous buck converters. Both high side and low-

side MOSFETs are N-channel.

The 3.3V and 5V switchers have pins for current sensing and

for setting of output over-current threshold using MOSFET

DS,on

. Each converter has a pin for voltage-sense feedback,

a pin that shuts down the converter, and a pin for generating

the boost voltage to drive the high-side MOSFET.

The following discussion of the FAN5235 design will be

done with reference to Figures 1 through 4, showing the

internal block diagram of the IC.

3.3V and 5V PWM Current Sensing

Peak current sensing is done on the low side driver because

of the very low duty-cycle on the high side MOSFET. The

current is sampled 50ns after turn on and the value is held for

current feedback and over-current limit.

3.3V and 5V PWM Loop Compensation

The 3.3V and 5V control loops of the FAN5235 function as

voltage mode with current feedback for stability. They each

have an independent voltage feedback pin, as shown in

Figure 1. They use voltage feed-forward to guarantee loop

rejection of input voltage variation: that is to say that the

PWM (pulse width modulation) ramp amplitude is varied as

a function of the input voltage. Compensation of the control

loops is done entirely internally using current-mode feed-

back compensation. This scheme allows the bandwidth and

phase margin to be almost independent of output capacitance

and ESR.

3.3V and 5V PWM Current Limit

The 3.3V and 5V converters each sense the voltage across

their own low-side MOSFET to determine whether to enter

current limit. If an output current in excess of the current

limit threshold is measured then the converter enters a pulse

skipping mode where Iout is equal to the over-current (OC)

set limit. After 8 clock cycles then the regulator is latched off

(HSD and LSD off). This is the likely scenario in the case of

a "soft" short. If the short is "hard" it will instantly

trigger the under-voltage protection which again will latch

the regulator off (HSD and LSD off) after a 2µs delay.

Selection of a current-limit set resistor must include the

tolerance of the current-limit trip point, the MOSFET on

resistance and temperature coefﬁcient, and the ripple current,

in addition to the maximum output current.

Example: Maximum DC output current on the 5V is 5A,

the MOSFET R

DS,on

is 17mΩ, and the inductor is 5µH at a

current of 5A. Because of the low R

DS,on

, the low-side

MOSFET will have a maximum temperature (ambient +

self-heating) of only 75°C, at which its R

DS,on

increases to

20mΩ.

LDO

VIN

VFB5

5V ALWAYS

FAN5235

5V/3.3V-ALWAYS

LDO

3.3V ALWAYS

FAN5235

REV. 1.3.3 1/3/02 8

Peak current is DC output current plus peak ripple current:

where T is the maximum period, V

is output voltage, and L

is the inductance. This current generates a voltage on the

low-side MOSFET of 7A • 20mΩ = 140mV. The current

limit threshold is typically 150mV (worst-case 135mV) with

R2 = 1KΩ, and so this value is suitable. R2 could be

increased a further 10% if additional noise margin is deemed

necessary.

Precision Current Limit

Precision current limiting can be achieved by placing a

discrete sense resistor between the source of the low-side

MOSFET and ground.

In this case, current limit accuracy is set by the tolerance of

the IC, +10%.

Figure 4. Using a Precision Current Sense Resistor

Shutdown (SDWN)

The SDWN pin turns off all 5 converters (+5V, +3.3V, and

+12V, 5V/3.3V-ALWAYS) and puts the FAN5235 into a low-

power mode (Shutdown mode).

This mode of operation implies the use of a push button

switch between SDWN and Vin. Pushing the button allows

(for the duration of the contact) to power the 3.3V-ALWAYS

and 5V-ALWAYS long enough for the uC to power up and in

turn latch the SDWN pin high.

Once the SD

WN is high then the ALWAYS voltages are

enabled to go high if the respective SDN3.3 and SDN5 go

high.

MAIN 3.3V and 5V Softstart, Sequencing and

Stand-by

Softstart of the 3.3V and 5V converters is accomplished by

means of an external capacitor between pins SDN3.3

(SDN5)

and ground.

The 3.3V (5V) main converter is turned ON if SD

WN and

SDN3.3

(SDN5) are both high and is turned off if either SDWN

or SDN3.3

(SDN5) is low.

Stand-by mode is deﬁned as the condition by which V-Mains

are OFF and V-ALWAYS are ON (SDWN=1 and

SDN3.3=SDN5=0).

ALWAYS mode of Operation

If it is desired that 5V-ALWAYS and 3.3V-ALWAYS are always

ON then the SDWN pin must be connected to Vin permanently.

This way the two ALWAYS regulators come up as soon as there

is power while the state of the Main regulators can be controlled

via the SDN5 and SDN3.3 pins.

Sequencing Table

3.3V Voltage Adjustment

The output voltage of the 3.3V converter can be increased by

as much as 10% by inserting a resistor divider in the feedback

line. The feedback pin impedance is about 66KΩ. Thus, for

example, to increase the output of the 3.3V converter by 10%,

use a 2.21KΩ/33.2KΩ divider.

Note that the output of the 5V regulator cannot be adjusted.

The feedback line of the 5V regulator is used internally as a

5V supply and, therefore, cannot tolerate any impedance in

series with it.

3.3V and 5V Main Overvoltage Protection

(Soft Crowbar)

When the output voltage of the 3.3V (or the 5V) converter

exceeds approximately 115% of nominal, the converter enters

the over-voltage (OV) protection mode, with the goal of pro-

tecting the load from damage. During operation, severe load

dump or a short of an upper MOSFET could cause the output

voltage to increase signiﬁcantly over normal operation range

without circuit protection. When the output exceeds the over-

voltage threshold, the over-voltage comparator forces the

lower gate driver high and turns the lower MOSFET on. This

will pull down the output voltage and eventually may blow the

battery fuse. As soon as output voltage drops below the thresh-

old, OVP comparator is disengaged.

The OVP scheme also provides a soft crowbar function

(bang-bang control followed by blow of the fuse) which

helps to tackle severe load transients but does not invert out-

put voltage when activated—a common problem for OVP

schemes with a latch. The prevention of output inversion

eliminates the need for a Schottky diode across the load.

= 5A +

4µsec • 5V

2 • 5µH

= 7A

≈

HSD

LSD

ISEN

GND

SDN5 SDN3.3 SDWN

3V&5V

ALWAYS

MAIN

3.3V

MAIN

X X 0 0 0 0

001 1 0 0

101 1 1 0

01 1 1 0 1

1 1 1 1 1 1

FAN5235

REV. 1.3.3 1/3/02 9

3.3V and 5V Under-voltage Protection

When the output voltage of either the 3.3V or 5V falls below

75% of the nominal value, both converters, go into under-

voltage (UV) protection, after a 2usec delay. In under-

voltage protection, the high and low side MOSFETs are

turned off. Once under-voltage protection is triggered, it

remains on until power is recycled or the SDWN pin is reset.

12V Architecture

The 12V converter is a traditional non-isolated ﬂy-back (also

known as a "boost" converter). The converter’s input voltage

is the +5V switcher output, so that +12V can only be present

if +5V is present. Also, if the external MOSFET is off, the

output of the +12V converter is +5V, not zero. This in turn

will provide non-zero output for the 12V regulator.

For complete turn-off of the 12V regulator an external

P-channel MOSFET or an LDO regulator with on/off control

may be used. If an LDO is used for 12V then the boost

converter should be set to 13.2V using the external resistor

divider network.

12V Loop Compensation

The 12V converter should be run in discontinuous conduc-

tion mode. In this mode, the converter will be stable if a

capacitor with suitable ESR value is selected. A 68uF

tantalum with 500mA ripple current rating and 95mΩ is

recommended here.

12V Protection

The 12V converter is protected against overvoltage. If the

12V feedback is more than 10–15% above the nominal set

voltage, a comparator forces the MOSFET off until the volt-

age falls below the comparator threshold.

The 12V converter is also protected against over-current. If a

short circuit pulls the output below 9V, all of the switching

converters go into UV protection, after a 2µs delay. In UV

protection, all MOSFETs are turned off. Once UV protection

is triggered, it remains on until the input power is recycled or

the SDWN is reset.

12V Softstart and Sequencing

The 12V output is started at the same time as the 5V output.

The softly rising 5V output automatically generates a softly

rising 12V output. The duty cycle of the 12V PWM is lim-

ited to prevent excessive current draw.

The 12V supply must build up a voltage higher than the

UVLO limit (9V) by the time the 5V is above its UVLO

(3.75V) in order to avoid triggering of UV protection during

soft start.

5V/3.3V-ALWAYS Operation

The 5V-ALWAYS supply is generated from either the on-

chip linear regulator or through an internal switch from the

VFB pin of the 5V switching supply.

When the 5V switching supply is off, or if its output voltage

is not within tolerance, the 5V-ALWAYS switch is open, and

the linear regulator is on. When the 5V switching supply is

running and has an output voltage within speciﬁcation, the

linear regulator is off, and the switch is on. The switch has

sufﬁciently low resistance that at maximum current draw on

the 5V-ALWAYS supply, the output voltage is regulated

within speciﬁcations.

The 3.3V-ALWAYS is generated from a linear regulator

attached internally to the 5V-ALWAYS.

The purpose of the two ALWAYS supplies (combined cur-

rent is speciﬁed to never exceed 50mA) is to provide power

to the system micro-controller (8051 class) as well as other

IC’s needing a stand-by power. The micro-controller as well

as the other IC’s could be operated from either 5V or 3.3V

ALWAYS, so the FAN5235 provides both.

5V/3.3V-ALWAYS Protections

The two internal linear regulators are current limited and

under-voltage protected. Once protection is triggered all

outputs are turned off until power is cycled or the SDWN is

reset.

Power good

Power good is asserted when both PWM Buck converters are

above speciﬁed threshold. No other regulators are monitored

by Power good. When PGOOD goes low it will stay low for

at least 10µsec (Tw). See ﬁg. 5.

Figure 5. PGOOD Timing Diagram

Vmain

PGOOD

Vth

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15

FAN5235QSC

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