NCP1256
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13
level does not properly collapse in presence of an
output short). In this controller, every time the internal
0.8−V maximum peak current limit is activated (or less
when OPP is used), an error flag is asserted and a time
period starts, thanks to the programmable timer. When
the timer has elapsed, the controller enters a
double−hiccup auto−recovery mode or is fully latched
depending on the selected option.
Please note that with the latched OCP option, the part
becomes sensitive to the UVLO event only at the first
power−on sequence. Any UVLO event is ignored
afterwards (normal auto−recovery operation). This is to pass
the pre−short test at power up:
1. if the internal error flag is armed (short circuit)
AND a UVLO event is sensed, the part is
immediately latched. UVLO sensing is ignored
after the first sucessful start−up sequence.
2. if an UVLO signal is detected but the error flag is
not asserted, double−hiccup auto−recovery occurs
and the part tries to resume operations.
3. if the error flag is asserted without UVLO, the part
classically permanently latches off.
Start−up Sequence
The NCP1256 start−up voltage is purposely made high to
permit large energy storage in a small V
cc
capacitor value.
This helps operate with a small start−up current which,
together with a small V
cc
capacitor, will not hamper the
start−up time. To further reduce the standby power, the
controller start−up current is purposely kept low, below
10 mA. Start−up resistors can therefore be connected to the
bulk capacitor or directly to the mains input voltage if you
wish to save a few more mW.
D1 D2
D3 D4
Input
mains
Cbulk
C1
X2
R1 R2
R3 R4
ICC1
CVcc
D5
1N4148
C4
D6
BAV21
aux
.
Vcc
I1
I2
I3
Figure 34. The startup resistor can be connected to the
input mains for further power dissipation reduction
Figure 34 shows a typical recommended configuration
where start−up resistors connect together to the mains input.
This technique offers the benefit of freely discharging the
X2 capacitor usually part of the EMI filter. The calculation
of these resistors depends on several parameters. Assuming
a 0.47−mF X2 capacitor, the safety standard recommends a
time constant less than 1 s maximum when a resistor is
connected in parallel to provide a discharge path. This sets
the upper limit for the sum of discharge resistors connected
to the controller V
cc
:
R
startup
t
1
0.47 m
t 2.1 MW
(eq. 1)
The first step starts with the calculation of the needed V
cc
capacitor which will supply the controller until the auxiliary
winding takes over. Experience shows that this time t
1
can
be between 5 and 20 ms. Considering that we need at least
an energy reservoir for a t
1
time of 10 ms, the V
cc
capacitor
must be larger than:
CV
CC
w
I
CC
t
1
VCC
on
* VCC
min
w
1.5 m 10 m
9
w 1.6 mF
(eq. 2)
Let us select a 2.2−mF capacitor at first and experiments
in the laboratory will let us know if we were too optimistic
for t
1
. Experiments across temperature range are important
as capacitance and ESR of this V
cc
capacitor can be affected.
The V
cc
capacitor being known, we can now evaluate the
charging current we need to bring the V
cc
voltage from 0 to
the IC VCC
on
voltage, 18 V typical. This current has to be
selected to ensure start−up at the lowest mains (85 V rms) to
be less than 3 s (2.5 s for design margin):
I
charge
w
VCC
on
C
V
CC
2.5
w
18 2.2 m
2.5
w 16 mA
(eq. 3)
If we account for the 10−mA current that will flow inside
the controller (I
1
in Figure 34), then the total charging
current delivered by the start−up resistor must be 26 mA,
rounded to 30 mA. If we connect the start−up network to both
