MAX5014/MAX5015
where C
SS
is the soft-start capacitor as shown in Figure 2.
Operation begins when V
SS_SHDN
ramps above 0.6V.
When soft-start has completed, V
SS_SHDN
is regulated
to 2.4V, the internal voltage reference. Pull V
SS_SHDN
below 0.25V to disable the controller.
Undervoltage lockout shuts down the controller when
V
CC
is less than 6.6V. The regulators for V+ and the ref-
erence remain on during shutdown.
Current-Sense Comparator
The current-sense (CS) comparator and its associated
logic limit the peak current through the MOSFET.
Current is sensed at CS as a voltage across a sense
resistor between the source of the MOSFET and GND.
To reduce switching noise, connect CS to the external
MOSFET source through a 100 resistor or an RC low-
pass filter (Figures 2, 3). Select the current-sense resis-
tor, R
SENSE
according to the following equation:
where I
LimPrimary
is the maximum peak primary-side
current.
When V
CS
> 465mV, the power MOSFET switches off.
The propagation delay from the time the switch current
reaches the trip level to the driver turn-off time is 170ns.
PWM Comparator and Slope Compensation
An internal 275kHz oscillator determines the switching
frequency of the controller. At the beginning of each
cycle, NDRV switches the N-channel MOSFET on.
NDRV switches the external MOSFET off after the maxi-
mum duty cycle has been reached, regardless of the
feedback.
The MAX5014 uses an internal ramp generator for
slope compensation. The internal ramp signal is reset
at the beginning of each cycle and slews at 26mV/µs.
The PWM comparator uses the instantaneous current,
the error voltage, the internal reference, and the slope
compensation (MAX5014 only) to determine when to
switch the N-channel MOSFET off. In normal operation
the N-channel MOSFET turns off when:
where I
PRIMARY
is the current through the N-channel
MOSFET, V
REF
is the 2.4V internal reference and
V
SCOMP
is a ramp function starting at 0 and slewing at
26mV/µs (MAX5014 only). When using the MAX5014 in
a forward-converter configuration the following condi-
tion must be met to avoid control-loop subharmonic
oscillations:
where k = 0.75 to 1, and N
S
and N
P
are the number of
turns on the secondary and primary side of the trans-
former, respectively. L is the output filter inductor. This
makes the output inductor current downslope as refer-
enced across R
SENSE
equal to the slope compensa-
tion. The controller responds to transients within one
cycle when this condition is met.
N-Channel MOSFET Gate Driver
NDRV drives an N-channel MOSFET. NDRV sources
and sinks large transient currents to charge and dis-
charge the MOSFET gate. To support such switching
transients, bypass V
CC
with a ceramic capacitor. The
average current as a result of switching the MOSFET is
the product of the total gate charge and the operating
frequency. It is this current plus the DC quiescent cur-
rent that determines the total operating current.
Applications Information
Design Example
The following is a general procedure for designing a
forward converter (Figure 2) using the MAX5015.
1) Determine the requirements.
2) Set the output voltage.
3) Calculate the transformer primary to secondary
winding turns ratio.
4) Calculate the reset to primary winding turns ratio.
5) Calculate the tertiary to primary winding turns
ratio.
6) Calculate the current-sense resistor value.
7) Calculate the output inductor value.
8) Select the output capacitor.
The circuit in Figure 2 was designed as follows:
1) 36V V
IN
72V, V
OUT
= 5V, I
OUT
= 10A, V
RIPPLE
50mV
2) To set the output voltage calculate the values of
resistors R1 and R2 according to the following
equation:
N
N
kR V
S
P
SENSE OUT
×
××
L
mV s26 /
IRV-V-VS
PRIMARY SENSE OPTO REF COMP
×>
RI
SENSE LimPrimary
= 0 465./V
t
ms
C
startup ss
045.
nF
Current-Mode PWM Controllers with Integrated
Startup Circuit for Isolated Power Supplies
10 ______________________________________________________________________________________
where V
REF
is the reference voltage of the shunt
regulator, and R
1
and R
2
are the resistors shown in
Figures 2 and 3.
3) The turns ratio of the transformer is calculated based
on the minimum input voltage and the lower limit of
the maximum duty cycle for the MAX5015 (44%). To
enable the use of MOSFETs with drain-source
breakdown voltages of less than 200V use the
MAX5015 with the 50% maximum duty cycle.
Calculate the turns ratio according to the following
equation:
where:
N
S
/N
P
= Turns ratio (N
S
is the number of secondary
turns and N
P
is the number of primary turns).
V
OUT
= Output voltage (5V).
V
D1
= Voltage drop across D1 (typically 0.5V for
power Schottky diodes).
D
MAX
= Minimum value of maximum operating duty
cycle (44%).
V
IN_MIN
= Minimum Input voltage (36V).
In this example:
Choose N
P
based on core losses and DC resis-
tance. Use the turns ratio to calculate N
S
, rounding
up to the nearest integer. In this example N
P
= 14
and N
S
= 5.
For a forward converter choose a transformer with a
magnetizing inductance in the neighborhood of
200µH. Energy stored in the magnetizing inductance
of a forward converter is not delivered to the load
and must be returned back to the input; this is
accomplished with the reset winding.
The transformer primary to secondary leakage
inductance should be less than 1µH. Note that all
leakage energy will be dissipated across the MOS-
FET. Snubber circuits may be used to direct some or
all of the leakage energy to be dissipated across a
resistor.
To calculate the minimum duty cycle (D
MIN
) use the
following equation:
=
where V
IN_MAX
is the maximum input voltage (72V).
4) The reset winding turns ratio (N
R
/N
P
) needs to be
low enough to guarantee that the entire energy in
the transformer is returned to V+ within the off cycle
at the maximum duty cycle. Use the following equa-
tion to determine the reset winding turns ratio:
where:
N
R
/N
P
= Reset winding turns ratio.
D
MAX
= Maximum value of Maximum Duty Cycle.
Round N
R
to the nearest smallest integer.
The turns ratio of the reset winding (N
R
/N
P
) will
determine the peak voltage across the N-channel
MOSFET.
Use the following equation to determine the maxi-
mum drain-source voltage across the N-channel
MOSFET:
V
DSMAX
= Maximum MOSFET drain-source voltage.
V
IN_MAX
= Maximum input voltage.
Choose MOSFETs with appropriate avalanche
power ratings to absorb any leakage energy.
5) Choose the tertiary winding turns ratio (N
T
/N
P
) so
that the minimum input voltage provides the mini-
mum operating voltage at V
DD
(13V). Use the follow-
V71 +
14
14
DSMAX
≥×
=2 144VV
VV 1 +
N
N
DSMAX IN_MAX
P
R
≥×
N1
1- 0.5
0.5
R
≤× =414
NN
1-D
D
RP
MAX
MAX
≤×
D
V
V
N
N
-V
MIN
OUT
IN_MAX
S
P
D1
=
×
=19 8.
N
N
5V+ 0.5V 0.44
S
P
×
()
×
=
044 36
0 330
.
.
V
N
N
VVD
DV
S
P
OUT D1 MAX
MAX IN_MIN
()
×
V
V
R
RR
REF
OUT
2
12
=
+
MAX5014/MAX5015
Current-Mode PWM Controllers with Integrated
Startup Circuit for Isolated Power Supplies
______________________________________________________________________________________ 11
MAX5014/MAX5015
ing equation to calculate the tertiary winding turns
ratio:
where:
V
DDMIN
is the minimum V
DD
supply voltage (13V).
V
DDMAX
is the maximum V
DD
supply voltage (36V).
V
IN_MIN
is the minimum input voltage (36V).
V
IN_MAX
is the maximum input voltage (72V in this
design example).
N
P
is the number of turns of the primary winding.
N
T
is the number of turns of the tertiary winding.
Choose N
T
= 6.
6) Choose R
SENSE
according to the following equation:
where:
V
ILim
is the current-sense comparator trip threshold
voltage (0.465V).
N
S
/N
P
is the secondary side turns ratio (5/14 in this
example).
I
OUTMAX
is the maximum DC output current (10A in
this example).
7) Choose the inductor value so that the peak ripple
current (LIR) in the inductor is between 10% and
20% of the maximum output current.
where V
D
is the output Schottky diode forward volt-
age drop (0.5V) and LIR is the ratio of inductor rip-
ple current to DC output current.
8) The size and ESR of the output filter capacitor deter-
mine the output ripple. Choose a capacitor with a
low ESR to yield the required ripple voltage.
Use the following equations to calculate the peak-to-
peak output ripple:
where:
V
RIPPLE
is the combined RMS output ripple due to
VRIPPLE,ESR, the ESR ripple, and V
RIPPLE,C
, the
capacitive ripple. Calculate the ESR ripple and
capacitive ripple as follows:
V
RIPPLE,ESR
= I
RIPPLE
x ESR
V
RIPPLE,C
= I
RIPPLE
/(2 x π x 275kHz x C
OUT
)
Layout Recommendations
All connections carrying pulsed currents must be very
short, be as wide as possible, and have a ground plane
as a return path. The inductance of these connections
must be kept to a minimum due to the high di/dt of the
currents in high-frequency switching power converters.
Current loops must be analyzed in any layout pro-
posed, and the internal area kept to a minimum to
reduce radiated EMI. Ground planes must be kept as
intact as possible.
Chip Information
TRANSISTOR COUNT: 589
PROCESS: BiCMOS
VV V
RIPPLE
RIPPLEESR RIPPLE C
=+
,,
22
L
-
()
×
()
××
5 5 1 0 198
0 4 275 10
401
..
.
.
kHz A
H
L
V-
OUT
+
()
×
()
×× ×
VD
LIR kHz I
DMIN
OUTMAX
1
2 275
R
SENSE
××
=Ω
0 465
5
14
12 10
109
.
.
V
m
R
V
N
N
SENSE
ILIM
S
P
××12.I
OUTMAX
13 7
4
36 7
14
533 714
..
..
36
1N
72
N
T
T
×≤ ×
≤≤
V
V
NN
V
V
N
DDMIN
IN_MIN
PT
DDMAX
IN_MAX
P
+
×≤≤
+
×
07
07
.
.
Current-Mode PWM Controllers with Integrated
Startup Circuit for Isolated Power Supplies
12 ______________________________________________________________________________________

MAX5015ESA+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Switching Controllers w/Integrated Startup
Lifecycle:
New from this manufacturer.
Delivery:
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