MAX1400
+5V, 18-Bit, Low-Power, Multichannel,
Oversampling (Sigma-Delta) ADC
______________________________________________________________________________________ 25
Table 16b. MAX1400 Noise vs. Gain and Output Data Rate—Buffered Mode,
V
REF
= 2.5V, f
CLKIN
= 2.4576MHz
PROGRAMMABLE GAIN
x1
x2 x4 x8 x16 x32 x64 x128
MF1:MF0 = 0
FS1:FS0 = 37.8913.5926.0752.48102.18205.60394.00803.8712584800
FS1:FS0 = 37.97
13.3325.7152.98105.18202.57408.09851.32628.8
2400
FS1:FS0 = 23.023.645.269.9218.0836.8073.71148.57314.41200
FS1:FS0 = 11.251.221.291.351.472.243.897.4062.9240
FS1:FS0 = 01.10
1.161.161.241.351.923.216.5552.4
200
MF1:MF0 = 2
FS1:FS0 = 37.87
13.5026.7752.39101.39201.87408.48830.30314.41200
FS1:FS0 = 23.413.925.489.3217.7736.0469.52143.45157.2600
FS1:FS0 = 11.461.451.491.451.642.534.128.3731.4120
FS1:FS0 = 23.213.795.459.5217.3635.9268.92144.96628.82400
FS1:FS0 = 11.311.301.341.401.582.284.147.58125.7480
FS1:FS0 = 01.21
1.171.211.281.382.213.836.60104.8
400
MF1:MF0 = 3
FS1:FS0 = 01.35
1.341.311.341.522.253.668.1026.2
100
MF1:MF0 = 1
FS1:FS0 = 37.78
13.7525.8550.28102.14195.95405.95823.33157.2600
FS1:FS0 = 23.524.105.609.3518.3235.6571.62142.0278.6300
FS1:FS0 = 11.481.491.531.491.642.544.247.1115.760
FS1:FS0 = 0
BIT
STATUS
1.39
TYPICAL OUTPUT NOISE IN µV
RMS
1.371.321.401.502.35
OUTPUT
DATA
RATE
(Hz)
4.136.0513.150
-3dB
FREQ.
(Hz)
10
12
11
14
13
16
15
17
19
18
20
1482 163264128
GAIN (V/V)
EFFECTIVE RESOLUTION (BITS)
10
12
11
14
13
16
15
17
19
18
20
1482 163264128
GAIN (V/V)
EFFECTIVE RESOLUTION (BITS)
CLK = 1
FS1: FS0 = 0 or 1
FS1: FS0 = 2
FS1: FS0 = 3
BUFF = 1
CLK = 1
FS1: FS0 = 0 or 1
FS1: FS0 = 2
FS1: FS0 = 3
BUFF = 0
a) BUFF = 0
b) BUFF = 1
Figure 7. Effective Resolution vs. Gain and Notch Frequency
MAX1400
+5V, 18-Bit, Low-Power, Multichannel,
Oversampling (Sigma-Delta) ADC
26 ______________________________________________________________________________________
The noise shown in Table 16 is composed of device noise
and quantization noise. The device noise is relatively low
but becomes the limiting noise source for high gain set-
tings. The quantization noise is determined by the notch
frequency and becomes the dominant noise source as the
notch frequency is increased.
Offset Correction DAC
The MAX1400 provides a coarse (3-bit plus sign) offset
correction DAC at the modulator input. Use this DAC to
remove the offset component in the input signal, allowing
the ADC to operate on a more sensitive range. The DAC
offsets up to ±116.7% of the selected range in ±16.7%
increments for unipolar mode and up to ±58.3% of the
selected range in ±8.3% increments for bipolar mode.
When a DAC value of 0 is selected, the DAC is completely
disconnected from the modulator inputs and does not
contribute any noise. Figures 8 and 9 show the effect of
the DAC codes on the input range and transfer function.
Clock Oscillator
The clock oscillator may be used with an external crystal
(or resonator) connected between CLKIN and CLKOUT,
or may be driven directly by an external oscillator at
CLKIN with CLKOUT left unconnected. In normal oper-
ating mode, the MAX1400 is specified for operation with
CLKIN at either 1.024MHz (CLK = 0) or 2.4576MHz
(CLK = 1, default). When operated at these frequencies,
the part may be programmed to produce frequency
response nulls at the local line frequency (either 60Hz or
50Hz) and the associated line harmonics.
In standby mode (STBY = 1) all circuitry, with the
exception of the serial interface and the clock oscillator,
is powered down. The interface consumes minimal
power with a static SCLK. Enter full power-down mode
(including the oscillator) by setting the FULLPD bit in
the special-function register. When exiting a full-power
shutdown, perform a hardware reset or a software reset
after the master clock signal is established (typically
10ms when using the on-board oscillator with an exter-
nal crystal) to ensure that any potentially corrupted reg-
isters are cleared.
It is often helpful to use higher-frequency crystals or
resonators, especially for surface-mount applications
where the result may be reduced PC board area for the
oscillator component and a lower price or better com-
ponent availability. Also, it may be necessary to oper-
ate the part with a clock source whose duty cycle is not
close to 50%. In either case, the MAX1400 can operate
with a master clock frequency of up to 5MHz, and
includes an internal divide-by-2 prescaler to restore the
internal clock frequency to a range of up to 2.5MHz
with a 50% duty cycle. To activate this prescaler, set
the X2CLK bit in the control registers. Note that using
CLKIN frequencies above 2.5MHz in combination with
the X2CLK mode will result in a small increase in digital
supply current.
ZERO SCALE 2621
MIDSCALE 131072
NEGATIVE DAC
STEP SHIFTS
THE TRANSFER
FUNCTION
TOWARD THE
POSITIVE RAIL.
PGA = 3
DAC = 0
PGA = 0
DAC = 0
PGA = 3
DAC = +3
MAX CODE 262144
FULL-SCALE 259522
INPUT VOLTAGE RANGE
CODE
AGND
(V
AIN
-)-V
REF
(V
AIN
-) - V
REF
/8 - V
REF
/16
(V
AIN
-) + V
REF
/8 - V
REF
/16
(V
AIN
-) - V
REF
/8
(V
AIN
-) + V
REF
/8
(V
AIN
-) + V
REF
V
AIN
V+
Figure 8. Effect of PGA and DAC Codes on the Bipolar
Transfer Function
DAC CODE
D3:
D2:
D1:
D0:
INPUT VOLTAGE RANGE
(V
REF = 2.5V
PGA = 000)
(V
REF = 1.25V
PGA = 000)
-7
1
1
1
1
-6
1
1
1
0
-5
1
1
0
1
-4
1
1
0
0
-3
1
0
1
1
-2
1
0
1
0
-1
1
0
1
0
0
0
0
0
0
+1
0
0
0
1
+2
0
0
1
0
+3
0
0
1
1
+4
0
1
0
0
+5
0
1
0
1
+6
0
1
1
0
+7
0
1
1
1
2.708V
2.50V
2.292V
2.083V
1.875V
1.667V
1.458V
1.25V
1.042V
0.833V
0.625V
0.416V
0.208V
0V
-0.208V
-0.416V
-0.625V
-0.833V
-1.042V
-1.25V
-1.458V
-1.667V
-1.875V
-2.083V
-2.292V
-2.50V
-2.708V
13/6 V
REF
/2
PGA
2 V
REF
/2
PGA
11/6 V
REF
/2
PGA
10/6 V
REF
/2
PGA
9/6 V
REF
/2
PGA
8/6 V
REF
/2
PGA
7/6 V
REF
/2
PGA
V
REF
/2
PGA
5/6 V
REF
/2
PGA
4/6 V
REF
/2
PGA
3/6 V
REF
/2
PGA
2/6 V
REF
/2
PGA
1/6 V
REF
/2
PGA
0
-1/6 V
REF
/2
PGA
-2/6 V
REF
/2
PGA
-3/6 V
REF
/2
PGA
-4/6 V
REF
/2
PGA
-5/6 V
REF
/2
PGA
-V
REF
/2
PGA
-7/6 V
REF
/2
PGA
-8/6 V
REF
/2
PGA
-9/6 V
REF
/2
PGA
-10/6 V
REF
/2
PGA
-11/6 V
REF
/2
PGA
-2 V
REF
/2
PGA
-13/6 V
REF
/2
PGA
5.00V
4.503V
4.167V
3.750V
3.333V
2.917V
2.50V
2.083V
1.667V
1.25V
0.833V
0.416V
0V
-0.416V
-0.833V
-1.25V
-1.667V
-2.083V
-2.50V
-2.917V
-3.333V
-3.750V
-4.167V
-4.503V
-5.00V
MINIMUM INPUT (U/B = 1)
MINIMUM INPUT (U/B = 0)
MAXIMUM INPUT
Figure 9. Input Voltage Range vs. DAC Code
MAX1400
+5V, 18-Bit, Low-Power, Multichannel,
Oversampling (Sigma-Delta) ADC
______________________________________________________________________________________ 27
Digital Filter
The on-chip digital filter processes the 1-bit data
stream from the modulator using a SINC
3
or SINC
3
fil-
ter. The SINC filters are conceptually simple, efficient,
and extremely flexible, especially where variable reso-
lution and data rates are required. Also, the filter notch
positions are easily controlled, since they are directly
related to the output data rate (1 / data word period).
The SINC
1
function results in a faster settling response
while retaining the same frequency response notches
as the default SINC
3
filter. This allows the filter to settle
faster at the expense of resolution and quantization
noise. The SINC
1
filter settles in one data word period.
With 60Hz notches (60Hz data rate), the settling time
would be 1 / 60Hz or 16.7ms whereas the SINC
3
filter
would settle in 3 / 60Hz or 50ms. Toggle between these
filter responses using the FAST bit in the global setup
register. Use SINC
1
mode for faster settling and switch
to SINC
3
mode when full accuracy is required. Switch
from the SINC
1
to SINC
3
mode by resetting the FAST
bit low. The DRDY signal will go false and will be
reasserted when valid data is available, a minimum of
three data-word periods later.
The digital filter can be bypassed by setting the MDOUT
bit in the global setup register. When MDOUT = 1, the
raw output of the modulator is directly available at
DOUT.
Filter Characteristics
The MAX1400 digital filter implements both a SINC
1
(sinx/x) and SINC
3
(sinx/x)
3
lowpass filter function. The
transfer function for the SINC
3
function is that of three
cascaded SINC
1
filters described in the z-domain by:
and in the frequency domain by:
where N, the decimation factor, is the ratio of the modu-
lator frequency f
M
to the output frequency f
N
.
Figure 10 shows the filter frequency response. The
SINC
3
characteristic cutoff frequency is 0.262 times the
first notch frequency. This results in a cutoff frequency
of 15.72Hz for a first filter notch frequency of 60Hz. The
response shown in Figure 10 is repeated at either side
of the digital filter’s sample frequency (f
M
) and at either
side of the related harmonics (2f
M
, 3f
M
, . . .).
The response of the SINC
3
filter is similar to that of a
SINC
1
(averaging filter) filter but with a sharper rolloff.
The output data rate for the digital filter corresponds
with the positioning of the first notch of the filter’s fre-
quency response. Therefore, for the plot of Figure 10
where the first notch of the filter is at 60Hz, the output
data rate is 60Hz. The notches of this (sinx/x)
3
filter are
repeated at multiples of the first notch frequency. The
SINC
3
filter provides an attenuation of better than
100dB at these notches.
Determine the cutoff frequency of the digital filter by the
value loaded into CLK, X2CLK, MF1, MF0, FS1, and
FS0 in the global setup register. Programming a differ-
ent cutoff frequency with FS0 and FS1 does not alter
the profile of the filter response; it changes the frequen-
cy of the notches. For example, Figure 11 shows a cut-
off frequency of 13.1Hz and a first notch frequency of
50Hz.
For step changes at the input, a settling time must be
allowed before valid data can be read. The settling time
depends upon the output data rate chosen for the filter.
The settling time of the SINC
3
filter to a full-scale step
H(f)
1
N
sin Np
f
f
sin p
f
f
M
M
3
=
H(z)
1
N
1z
1z
N
1
3
=
-160
-120
-140
-100
-80
-60
-20
-40
0
0 40608020 100 120 140 160 180 200
FREQUENCY (Hz)
GAIN (dB)
f
CLKIN
= 2.4576MHz
MF1, 0 = 0
FS1, 0 = 1
f
N
= 60Hz
Figure 10. Frequency Response of the SINC
3
Filter (Notch at
60Hz)

MAX1400CAI+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Analog to Digital Converters - ADC 18-Bit 5Ch 4.8ksps 2.5V Precision ADC
Lifecycle:
New from this manufacturer.
Delivery:
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