K104K10X7RF5WH5

P1-P3 P4-P6 P7-P9 P10-P11

IRFR/U3412PbF

4 www.irf.com

Fig 8. Maximum Safe Operating Area

Fig 6. Typical Gate Charge Vs.

Gate-to-Source Voltage

Fig 5. Typical Capacitance Vs.

Drain-to-Source Voltage

Fig 7. Typical Source-Drain Diode

Forward Voltage

0.0 0.5 1.0 1.5 2.0 2.5 3.0

V

SD

, Source-toDrain Voltage (V)

0.1

1.0

10.0

100.0

1000.0

I

S

D

,

R

e

v

e

r

s

e

D

r

a

i

n

C

u

r

r

e

n

t

(

A

)

T

J

= 25°C

T

J

= 175°C

V

GS

= 0V

1 10 100 1000

V

DS

, Drain-toSource Voltage (V)

0.1

1

10

100

1000

I

D

,

D

r

a

i

n

-

t

o

-

S

o

u

r

c

e

C

u

r

r

e

n

t

(

A

)

Tc = 25°C

Tj = 175°C

Single Pulse

1msec

10msec

OPERATION IN THIS AREA

LIMITED BY R

DS

(on)

100µsec

1 10 100

V

DS

, Drain-to-Source Voltage (V)

100

1000

10000

100000

C

,

C

a

p

a

c

i

t

a

n

c

e

(

p

F

)

Coss

Crss

Ciss

V

GS

= 0V, f = 1 MHZ

C

iss

= C

gs

+ C

gd

, C

ds

SHORTED

C

rss

= C

gd

C

oss

= C

ds

+ C

gd

0 20406080100

Q

G

Total Gate Charge (nC)

0

4

8

12

16

20

V

G

S

,

G

a

t

e

-

t

o

-

S

o

u

r

c

e

V

o

l

t

a

g

e

(

V

)

V

DS

= 80V

VDS= 50V

VDS= 20V

I

D

= 29A

IRFR/U3412PbF

www.irf.com 5

Fig 10a. Switching Time Test Circuit

V

DS

9

0%

1

0%

V

GS

t

d(on)

t

r

t

d(off)

t

f

Fig 10b. Switching Time Waveforms

V

DS

Pulse Width ≤ 1 µs

Duty Factor ≤ 0.1 %

R

D

V

GS

R

G

D.U.T.

V

GS

+

-

V

DD

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

Fig 9. Maximum Drain Current Vs.

Case Temperature

0.01

0.1

1

10

0.00001 0.0001 0.001 0.01 0.1

Notes:

1. Duty factor D = t / t

2. Peak T = P x Z + T

1 2

J DM thJC C

P

t

t

DM

1

2

t , Rectangular Pulse Duration (sec)

Thermal Response (Z )

1

thJC

0.01

0.02

0.05

0.10

0.20

D = 0.50

SINGLE PULSE

(THERMAL RESPONSE)

25 50 75 100 125 150 175

0

10

20

30

40

50

T , Case Temperature ( C)

I , Drain Current (A)

°

C

D

LIMITED BY PACKAGE

IRFR/U3412PbF

6 www.irf.com

25 50 75 100 125 150 175

0

50

100

150

200

250

300

Starting T , Junction Temperature ( C)

E , Single Pulse Avalanche Energy (mJ)

J

AS

°

I

D

TOP

BOTTOM

12A

21A

29A

Q

G

Q

GS

Q

GD

V

G

Charge

D.U.T.

V

D

S

I

D

I

G

3mA

V

GS

.3µF

50KΩ

.2µF

12V

Current Regulator

Same Type as D.U.T.

Current Sampling Resistors

+

-

V

GS

Fig 13b. Gate Charge Test Circuit

Fig 13a. Basic Gate Charge Waveform

Fig 12b. Unclamped Inductive Waveforms

Fig 12a. Unclamped Inductive Test Circuit

t

p

V

(BR)DSS

I

AS

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

R

G

I

AS

0.01

Ω

t

p

D.U.T

L

V

DS

+

-

V

DD

DRIVER

A

15V

20V

V

GS

P1-P3 P4-P6 P7-P9 P10-P11

K104K10X7RF5WH5

Mfr. #:

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Multilayer Ceramic Capacitors MLCC - Leaded K 50V 100NF +/-10% X7R AMMO E3

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