H11AG2300

Figure 5. Normalized Collector Base Photocurrent Ratio vs. Forward Current
I
F
- FORWARD CURRENT - mA
0 102030405060708090100
N
O
R
M
A
L
I
Z
E
D
I
C
B
-
C
O
L
L
E
C
T
O
R
B
A
S
E
P
H
O
T
O
C
U
R
R
E
N
T
0
5
10
15
20
25
30
Figure 6. Normalized Collector - Base Current vs. Temperature
T
A
- AMBIENT TEMPERATURE -
o
C
-60 -40 -20 0 20 40 60 80 100
N
O
R
M
A
L
I
Z
E
D
C
O
L
L
E
C
T
O
R
-
B
A
S
E
C
U
R
R
E
N
T
0.001
0.01
0.1
1
10
A
NORMALIZED TO:
I
F
= 5mA
V
CB
= 5V
T = 25
o
C
NORMALIZED TO:
I
F
= 5mA
V
CB
= 5V
T
A
= 25
o
C
I
F
= 0.2mA
I
F
= 1mA
I
F
= 0.5mA
I
F
= 2mA
I
F
= 5mA
I
F
= 10mA
Figure 7. Collector-Emitter Dark Current vs. Ambient Temperature
T
A
- AMBIENT TEMPERATURE (
o
C)
0 102030405060708090100
I
C
E
O
-
D
A
R
K
C
U
R
R
E
N
T
(
n
A
)
0.1
1
10
100
1000
10000
I
F
= 0mA
V
CE
= 10V
www.fairchildsemi.com 4 OF 8 1/28/02 DS300213
PHOTOTRANSISTOR OPTOCOUPLERS
H11AG1 H11AG2 H11AG3
Figure 8. CMOS Input, 3KW, Zero Voltage Switching Solid State Relay
15K
+5V
0.16mA
CMOS
CONTROL
H11AG1
1.5M
75K 47
22K
0.1
C203D
DT230H
(4)
150pF
25A
LOAD
47
SC160B
V130LA20A
120V
60Hz
SUPPLY
2N4256
3V V
CC
10V
1N148
C
1
AC
INPUT
VOLTAGE
Figure 9. Telephone Ring Detector/A.C. Line CMOS Input Isolator
R
1
4093 or
74HC14
H11AG1
47K
4.7M
C
2
0.1
4.7K
The H11AG1s superior performance at low input currents allows standard CMOS logic circuits to directly operate a 25A solid state relay.
Circuit operation is as follows: power switching is provided by the SC160B, 25A triac. Its gate is controlled by the C203B via the DT230H
rectifier bridge. The C203B turn-on is inhibited by the 2N4256 when line voltage is above 12V and/or the H11AG is off. False trigger and
dv/dt protection are provided by the combination of the MOV
varistor and RC snubber network.
The H11AG1 uses less input power than the neon bulb traditionally used to monitor telephone and line voltages. Additionally. response
time can be tailored to ignore telephone dial tap, switching transients and other undesired signals by modifying the value of C2. The high
impedance to line voltage also can simply board layout spacing requirements.
INPUT R
1
C
1
Z
40-90 VRMS 75 K 0.1 µF
109K
20 Hz 1/10 W 100 V
95-135 VRMS 180 K 12 ηF
285K
60 Hz 1/10 W 200 V
200-280 VRMS 390 K 6.80 ηF
550K
50/60 Hz 1/4 W 400 V
DC component of input voltage is ignored due to C1
DS300213 1/28/02 5 OF 8 www.fairchildsemi.com
PHOTOTRANSISTOR OPTOCOUPLERS
H11AG1 H11AG2 H11AG3
Lead Coplanarity : 0.004 (0.10) MAX
0.270 (6.86)
0.240 (6.10)
0.350 (8.89)
0.330 (8.38)
0.300 (7.62)
TYP
0.405 (10.30)
MAX
0.315 (8.00)
MIN
0.016 (0.40) MIN
2
5
PIN 1
ID.
0.016 (0.41)
0.008 (0.20)
0.100 (2.54)
TYP
0.022 (0.56)
0.016 (0.41)
0.070 (1.78)
0.045 (1.14)
0.200 (5.08)
0.165 (4.18)
4
3
0.020 (0.51)
MIN
1
6
0.100 (2.54)
TYP
0.020 (0.51)
MIN
0.350 (8.89)
0.330 (8.38)
0.270 (6.86)
0.240 (6.10)
PIN 1
ID.
0.022 (0.56)
0.016 (0.41)
0.070 (1.78)
0.045 (1.14)
0.200 (5.08)
0.135 (3.43)
0.300 (7.62)
TYP
0° to 15°
0.154 (3.90)
0.100 (2.54)
SEATING PLANE
0.016 (0.40)
0.008 (0.20)
SEATING PLANE
0.016 (0.40)
0.008 (0.20)
0.070 (1.78)
0.045 (1.14)
0.350 (8.89)
0.330 (8.38)
0.154 (3.90)
0.100 (2.54)
0.200 (5.08)
0.135 (3.43)
0.004 (0.10)
MIN
0.270 (6.86)
0.240 (6.10)
0.400 (10.16)
TYP
0° to 15°
0.022 (0.56)
0.016 (0.41)
0.100 (2.54) TYP
NOTE
All dimensions are in inches (millimeters)
0.070 (1.78)
0.060 (1.52)
0.030 (0.76)
0.100 (2.54)
0.295 (7.49)
0.415 (10.54)
Package Dimensions (Surface Mount)Package Dimensions (Through Hole)
Package Dimensions (0.4”Lead Spacing) Recommended Pad Layout for
Surface Mount Leadform
www.fairchildsemi.com 6 OF 8 1/28/02 DS300213
PHOTOTRANSISTOR OPTOCOUPLERS
H11AG1 H11AG2 H11AG3

H11AG2300

Mfr. #:
Manufacturer:
ON Semiconductor / Fairchild
Description:
Transistor Output Optocouplers Optocoupler LC Phototransistor
Lifecycle:
New from this manufacturer.
Delivery:
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