13
FN6233.3
September 26, 2006
standard encodes sync on the Y channel and it is a negative-
going signal; easily handled by the ISL59830A without the need
of an additional supply as the ISL59830A generates a negative
rail placed at negative 1/2 the positive supply. Additionally, the
Pb and Pr are bipolar analog signals and the video signals are
negative-going; and again easily handled by the ISL59830A.
Driving Capacitive Loads and Cables
The ISL59830A, internally-compensated to drive 75Ω cables,
will drive 10pF loads in parallel with 1kΩ with less than 5dB of
peaking. If less peaking is required, a small series resistor,
usually between 5Ω to 50Ω, can be placed in series with the
output. This will reduce peaking at the expense of a slight
closed loop gain reduction. When used as a cable driver,
double termination is always recommended for reflection-free
performance. For those applications, a back-termination series
resistor at the amplifier's output will isolate the amplifier from
the cable and allow extensive capacitive drive. However, other
applications may have high capacitive loads without a back-
termination resistor. Again, a small series resistor at the output
can help to reduce peaking. The ISL59830A is a triple amplifier
designed to drive three channels; simply deal with each
channel separately as described in this section.
DC-Restore
When the ISL59830A is AC-coupled it becomes necessary
to restore the DC reference for the signal. This is
accomplished with a DC-restore system applied between the
capacitive "AC" coupling and the input of the device. Refer to
Application Circuit for reference DC-restore solution.
Disable/Power-Down
The ISL59830A can be disabled and its output placed in a
high impedance state. The turn-off time is around 25ns and
the turn-on time is around 200ns. When disabled, the
amplifier's supply current is reduced to 0.9mA typically,
thereby effectively eliminating the power consumption. The
amplifier's power-down can be controlled by standard TTL or
CMOS signal levels at the EN
and PD pins. The applied
logic signal is relative to V
S
- pin. Letting the EN and PD pins
float or applying a signal that is less than 0.8V above V
S
- will
enable the amplifier. The amplifier will be disabled when the
signal at EN
pin is 2V above V
S
-. The amplifier must be
disabled (EN pin is high) whenever the charge pump is
disabled (PD pin is high). EN
and PD pins should be
connected together to allow amplifier and charge pump
to enable/disable simultaneously.
Output Drive Capability
The ISL59830A does not have internal short-circuit
protection circuitry. A short-circuit current of 80mA sourcing
and 150mA sinking for the output is connected to half way
between the rails with a 10Ω resistor. If the output is shorted
indefinitely, the power dissipation could easily increase such
that the part will be destroyed. Maximum reliability is
maintained if the output current never exceeds ±40mA, after
which the electro-migration limit of the process will be
exceeded and the part will be damaged. This limit is set by
the design of the internal metal interconnections.
Power Dissipation
With the high output drive capability of the ISL59830A, it is
possible to exceed the +150°C absolute maximum junction
temperature under certain load current conditions.
Therefore, it is important to calculate the maximum junction
temperature for an application to determine if load conditions
or package types need to be modified to assure operation of
the amplifier in a safe operating area.
The maximum power dissipation allowed in a package is
determined according to:
Where:
T
JMAX
= Maximum junction temperature
T
AMAX
= Maximum ambient temperature
Θ
JA
= Thermal resistance of the package
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the load, or:
for sourcing:
for sinking:
Where:
V
S
= Supply voltage
I
SMAX
= Maximum quiescent supply current
V
OUT
= Maximum output voltage of the application
R
LOAD
= Load resistance tied to ground
I
LOAD
= Load current
i = Number of output channels
By setting the two P
DMAX
equations equal to each other, we
can solve the output current and R
LOAD
to avoid the device
overheat.
PD
MAX
T
JMAX
T
AMAX
Θ
JA
---------------------------------------------
=
PD
MAX
V
S
I
SMAX
V
S
V
OUT
i()+×
V
OUT
i
R
L
i
-----------------
×=
PD
MAX
V
S
I
SMAX
V
OUT
iV
S
()+× I
LOAD
i×=
ISL59830A
14
FN6233.3
September 26, 2006
Power Supply Bypassing and Printed Circuit
Board Layout
Strip line design techniques are recommended for the input
and output signal traces. As with any high frequency device,
a good printed circuit board layout is necessary for optimum
performance. Lead lengths should be as short as possible.
The power supply pin must be well bypassed to reduce the
risk of oscillation. For normal single supply operation, where
the V
S
- pin is connected to the ground plane, a single 4.7µF
tantalum capacitor in parallel with a 0.1µF ceramic capacitor
from V
S
+ to GND will suffice. This same capacitor
combination should be placed at each supply pin to ground if
split-internal supplies are to be used. In this case, the V
S
-
pin becomes the negative supply rail.
For good AC performance, parasitic capacitance should be
kept to a minimum. Use of wire-wound resistors should be
avoided because of their additional series inductance. Use
of sockets should also be avoided if possible. Sockets add
parasitic inductance and capacitance can result in
compromised performance. Minimizing parasitic capacitance
at the amplifier's inverting input pin is also very important.
ISL59830A
15
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6233.3
September 26, 2006
ISL59830A
Shrink Small Outline Plastic Packages (SSOP)
Quarter Size Outline Plastic Packages (QSOP)
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.25mm (0.010
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.10mm (0.004 inch) total in excess
of “B” dimension at maximum material condition.
10. Controlling dimension: INCHES. Converted millimeter dimen-
sions are not necessarily exact.
α
INDEX
AREA
E
D
N
123
-B-
0.17(0.007) C A
M
B
S
e
-A-
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
h x 45°
C
H
0.25(0.010) B
M
M
L
0.25
0.010
GAUGE
PLANE
A2
M16.15A
16 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
(0.150” WIDE BODY)
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A 0.061 0.068 1.55 1.73 -
A1 0.004 0.0098 0.102 0.249 -
A2 0.055 0.061 1.40 1.55 -
B 0.008 0.012 0.20 0.31 9
C 0.0075 0.0098 0.191 0.249 -
D 0.189 0.196 4.80 4.98 3
E 0.150 0.157 3.81 3.99 4
e 0.025 BSC 0.635 BSC -
H 0.230 0.244 5.84 6.20 -
h 0.010 0.016 0.25 0.41 5
L 0.016 0.035 0.41 0.89 6
N16 167
α
-
Rev. 2 6/04

ISL59830AIAZ-T7

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Video Amplifiers ISL90842WIV1427Z LW NOISE LW PWR I2C BUS
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet