7
LT5537
5537fa
BLOCK DIAGRA
W
UU
U
PI FU CTIO S
ENBL (Pin 1): Enable Pin. When the input voltage is higher
than 1V, the circuit is ON. When the input voltage is less than
0.3V, or this pin is not connected, the chip is disabled (OFF).
IN
+
, IN
(Pins 2, 3): Differential Signal Input Pins. These
pins are internally biased to V
CC
– 0.4V. The impedance
between IN
+
and IN
is approximately 1.73k//1.45pF at
200MHz. The input pins should be AC coupled.
CAP
+
, CAP
(Pins 4, 5): External Filter Capacitor Pins. The
minimum RF input frequency can be lowered by adding an
optional external capacitor between CAP
+
and CAP
.
V
CC
(Pin 6): Power Supply Pin. This pin should be decoupled
using 1000pF and 0.1µF capacitors.
V
EE
(Pin 7): Ground pin.
OUT (Pin 8): Output pin.
Exposed Pad (Pin 9): Should be connected to PCB ground.
1
OFFSET
CANCELLATION
DETECTOR CELLS
BANDGAP REFERENCE
AND BIASING
OUTPUT
BUFFER
ENBL
3
IN
2
IN
+
5
CAP
OUT
5537 BD
V
EE
4
CAP
+
7k
7k
7
EXPOSED PAD
8
7
V
CC
6
7.2k
8
LT5537
5537fa
APPLICATIO S I FOR ATIO
WUUU
The LT5537 provides a log-linear relationship between an
RF/IF input voltage and its output. The input signal is
amplified successively by limiting amplifier stages. A series
of detector cells rectify the signals and produce an output
current which is log-linearly related to the input power with
a coefficient (I
SLOPE
) of 3.4µA/dB at 200MHz (independent
of the input termination impedance). This coefficient is
almost constant below 200MHz, but rises at higher fre-
quency. The normalized slope variation plot in Figure 1 can
be used to determine the log-linear coefficient at any
frequency. The slope of the output voltage curve is deter-
mined by the total load resistance at the output terminal.
V
SLOPE
= I
SLOPE
• R
LOAD
The on-chip pull-down resistor is 7.2k. The total load
resistance (R
LOAD
) can be adjusted by adding external
load resistance to change the output slope. For example,
to achieve a log-linear rate of 20mV/dB, a 33k resistor is
connected between the output pin and ground.
Slope = 3.4µA/dB • (7.2//33)k = 20.1mV/dB
Additionally, an off-chip capacitor may be used to reduce
the output time domain voltage ripple.
Figure 1. Slope Variation over Frequency
Figure 2. Simplified Output Circuit
FREQUENCY (MHz)
1
50
% OF 3.4µA/dB AT 200MHz
70
90
110
130
50 100 200 400 600 1000
5537 F01
150
60
80
100
120
140
DETECTOR
OUTPUT
V
CC
OUT
5537 F02
8
7.2k
9
LT5537
5537fa
APPLICATIO S I FOR ATIO
WUUU
Dynamic Range
The LT5537 is capable of detecting and log-converting an
input signal over a wide dynamic range. The range of the
output voltage may be limited, however, and the monoto-
nicity of the output versus input at high input level may be
affected if the supply voltage is low and the log-linear slope
is set too high. The minimum V
CC
to support 90dB
dynamic range with 20mV/dB slope is 2.8V under nominal
conditions at 25°C. The data shown in the Typical Perfor-
mance Characteristics plots was taken with V
CC
= 3V. If
there is difficulty encountered in achieving the desired
dynamic range, then the user is advised to increase the
supply voltage or else to decrease the output slope by
connecting a smaller valued resistor between the output
and ground.
7k
TO 2ND
STAGE
CAP
IN
+
V
BIAS
5537 F04
IN
V
CC
7k
CAP
+
Figure 3. Simplified Input Circuit
Figure 4. Input Admittance
Figure 5. Differential Input Matching to 200
Input Matching
The LT5537 has a high impedance input (Figure 3). The
differential input impedance is derived from S11 measure-
ment with one of the input pins AC grounded (Figure 4). At
200MHz, the input is equivalent to 1.73k//1.45pF (Table 1).
The input dynamic range is constant in voltage terms,
ranging from approximately –89dBVrms to 1dBVrms at
200MHz. The dynamic range expressed in power is
depen
dent on the actual impedance selected in the ap-
plication design.
Table 1. Parallel Equivalent RC of the LT5537 Input
FREQUENCY R C
100MHz 1.85k 1.51pF
200MHz 1.73k 1.45pF
400MHz 1.07k 1.48pF
600MHz 673 1.52pF
800MHz 435 1.65pF
1000MHz 303 1.78pF
The simplest way of input matching the LT5537 is to
terminate the input signal with a 50 resistor and AC
couple it to one of the input pins while AC grounding the
other input pin (Figure 13). The sensitivity (defined as the
minimum input power required for the output to be within
3dB of the ideal log-linear response) is –76.4dBm at
200MHz in this case.
To achieve the best sensitivity, the input termination
impedance should be increased and the input pins should
be differentially driven. An example application circuit is
shown in Figure 5 which uses a transformer to step up the
impedance and perform the balun function. The 240
resistor (R2) sets the impedance at the input of the chip to
200. A 1:4 transformer is used to match the 50 signal
source impedance to the circuit input impedance. C1 and
C2 are DC blocking capacitors. This application circuit has
a (3dB error) sensitivity of –82.4dBm at 200MHz.
M/A-COM
ETC4-1-2
(1:4)
N/C
IN
+
IN
C1
C2
R2
240
J1
INPUT
5537 F06
2
3

LT5537EDDB#TRMPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
RF Detector Wide Dynamic Rng RF/IF Log Detector
Lifecycle:
New from this manufacturer.
Delivery:
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