LOW SKEW, 1-TO-4
DIFFERENTIAL-TO-LVHSTL FANOUT BUFFER
8523I-03 DATA SHEET
2 REVISION A 11/9/15
TABLE 1. PIN DESCRIPTIONS
TABLE 2. PIN CHARACTERISTICS
Symbol Parameter Test Conditions Minimum Typical Maximum Units
C
IN
Input Capacitance 4pF
R
PULLUP
Input Pullup Resistor 51
KΩ
R
PULLDOWN
Input Pulldown Resistor 51
KΩ
Number Name Type Description
1 GND Power Power supply ground.
2 CLK_EN Input Pullup
Synchronizing clock enable. When HIGH, clock outputs follow clock
input. When LOW, Q outputs are forced low, nQ outputs are forced high.
LVCMOS / LVTTL interface levels.
3 CLK_SEL Input Pulldown
Clock select input. When HIGH, selects differential CLK1, nCLK1 inputs.
When LOW, selects CLK0, nCLK0 inputs.
LVCMOS / LVTTL interface levels.
4 CLK0 Input Pulldown Non-inverting differential clock input.
5 nCLK0 Input Pullup Inverting differential clock input.
6 CLK1 Input Pulldown Non-inverting differential clock input.
7 nCLK1 Input Pullup Inverting differential clock input.
8, 9 nc Unused No connect.
10 V
DD
Power Core supply pin.
11, 12 nQ3, Q3 Output Differential output pair. LVHSTL interface levels.
13, 18 V
DDO
Power Output supply pins.
14, 15 nQ2, Q2 Output Differential output pair. LVHSTL interface levels.
16, 17 nQ1, Q1 Output Differential output pair. LVHSTL interface levels.
19, 20 nQ0, Q0 Output Differential output pair. LVHSTL interface levels.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
