8
Notes:
1. ≤ 1 μs pulse width, 300 pps.
2. Derate linearly above 70°C free air temperature at a rate of 1.6 mW/°C. Proper application of the derating factors will prevent IC junction
temperatures from exceeding 125°C for ambient temperatures up to 85°C.
3. Derate linearly above 70°C free air temperature at a rate of 3.8 mW/°C.
4. Derate linearly above 70°C free air temperature at a rate of 4.6 mW/°C.
5. Duration of output short circuit time shall not exceed 10 ms.
6. The device is considered a two terminal device, pins 1, 2, 3, and 4 are connected together and pins 5, 6, 7, and 8 are connected together.
7. The t
PLH
propagation delay is measured from the 10 mA level on the leading edge of the input pulse to the 1.3 V level on the leading edge of
the output pulse.
8. The t
PHL
propagation delay is measured from the 10 mA level on the trailing edge of the input pulse to the 1.3 V level on the trailing edge of the
output pulse.
9. The rise time, t
r
, is measured from the 10% to the 90% level on the rising edge of the output logic pulse.
10. The fall time, t
f
, is measured from the 90% to the 10% level on the falling edge of the output logic pulse.
11. Common mode transient immunity in the logic high level is the maximum (negative) dV
CM
/dt on the trailing edge of the common mode pulse,
V
CM
, which can be sustained with the output voltage in the logic high state (i.e., V
O
≥ 2 V).
12. Common mode transient immunity in the logic low level is the maximum (positive) dV
CM
/dt on the leading edge of the common mode pulse,
V
CM
, which can be sustained with the output voltage in the logic low state (i.e., V
O
≤ 0.8 V).
13. Use of a 0.1 μF bypass capacitor connected between pins 5 and 8 is recommended.
14. In accordance with UL 1577, each optocoupler momentary withstand is proof tested by applying an insulation test voltage ≥ 4500 V rms for 1
second (leakage detection current limit, I
i-o
≤ 5 μA).
Figure 5. Typical Input Voltage vs. Temperature. Figure 6. Typical Logic Low Output Voltage vs.
Temperature.
Figure 7. Typical Logic High Output Current vs.
Temperature.
V
I
– LOOP VOLTAGE – VOLTS
-50 100
2.8
2.2
T
A
– AMBIENT TEMPERATURE –°C
-25 0 25
2.6
50 75
2.4
I
I
= 12 mA
I
I
= 20 mA
V
OL
– LOW LEVEL OUTPUT VOLTAGE – V
-60 100
1.0
0
T
A
– TEMPERATURE –°C
-40 0 20
0.7
60 80
0.3
40-20
0.9
0.8
0.6
0.5
0.4
0.2
0.1
V
CC
= 4.5 V
I
I
= 3 mA
I
O
= 6.4 mA
I
OH
– HIGH LEVEL OUTPUT CURRENT – mA
-60 100
0
-8
T
A
– TEMPERATURE –°C
-40 0 20
-3
60 80
-6
40-20
-1
-2
-4
-5
-7
V
CC
= 4.5 V
I
I
= 12 mA
V
O
= 2.7 V
V
O
= 2.4 V
Figure 2. Typical Output Voltage vs. Loop Cur-
rent.
Figure 3. Typical Current Switching Threshold vs.
Temperature.
I
I
– INPUT SWITCHING THRESHOLD – mA
-50 100
10
0
T
A
– AMBIENT TEMPERATURE –°C
-25 0 25
6
2
50 75
4
I
HYS
8
Figure 4. Typical Input Loop Voltage vs. Input
Current.
