Features
x Data output compatible with LSTTL, TTL and CMOS
x 20 K Baud data rate at 1400 metres line length
x Guaranteed On and Off thresholds
x LED is protected from excess current
x Input threshold hysteresis
x Three-state output compatible with data buses
x Internal shield for high Common Mode Rejection
x Safety approval
UL recognized -3750 V rms, for 1 minute
CSA approved
x Optically coupled 20 mA current loop transmitter,
HCPL-4100, also available
Applications
x Isolated 20 mA current
x Loop receiver in:
Computer peripherals
Industrial control equipment
Data communications equipment
A 0.1 μF bypass capacitor connected between pins 8 and 5 is recommended.
Description
The HCPL-4200 optocoupler is designed to operate as a
receiver in equipment using the 20 mA Current Loop. 20
mA current loop systems conventionally signal a logic
high state by transmitting 20 mA of loop current (MARK),
and signal a logic low state by allowing no more than a
few milliamperes of loop current (SPACE). Optical cou-
pling of the signal from the 20 mA current loop to the
logic output breaks ground loops and provides for a very
high common mode rejection. The HCPL-4200 aids in the
design process by providing guaranteed thresholds for
logic high state and logic low state for the current loop,
providing an LSTTL, TTL, or CMOS compatible logic in-
terface, and providing guaranteed common mode re-
jection. The buffer circuit on the current loop side of the
HCPL-4200 provides typically 0.8 mA of hysteresis which
increases the immunity to common mode and differen-
tial mode noise. The buffer also provides a controlled
amount of LED drive current which takes into account
any LED light output degradation. The internal shield al-
lows a guaranteed 1000 V/μs common mode transient
immunity.
Functional Diagram
HCPL-4200
Optically Coupled 20 mA Current Loop Receiver
Data Sheet
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.
