ADV7120KPZ30 Datasheet ADV7120KSTZ30, ADV7120KSTZ50, ADV7120KSTZ30-REEL | P7-P9

ADV7120

REV. B

–6–

TERMINOLOGY

Blanking Level

The level separating the SYNC portion from the video portion

of the waveform. Usually referred to as the front porch or back

porch. At 0 IRE units, it is the level which will shut off the pic-

ture tube, resulting in the blackest possible picture.

Color Video (RGB)

This usually refers to the technique of combining the three pri-

mary colors of red, green and blue to produce color pictures

within the usual spectrum. In RGB monitors, three DACs are

required, one for each color.

Sync Signal (SYNC)

The position of the composite video signal which synchronizes

the scanning process.

Gray Scale

The discrete levels of video signal between reference black and

reference white levels. An 8-bit DAC contains 256 different lev-

els while a 6-bit DAC contains 64.

Raster Scan

The most basic method of sweeping a CRT one line at a time to

generate and display images.

Reference Black Level

The maximum negative polarity amplitude of the video signal.

Reference White Level

The maximum positive polarity amplitude of the video signal.

Sync Level

The peak level of the SYNC signal.

Video Signal

That portion of the composite video signal which varies in gray

scale levels between reference white and reference black. Also

referred to as the picture signal, this is the portion which may be

visually observed.

CIRCUIT DESCRIPTION AND OPERATION

The ADV7120 contains three 8-bit D/A converters, with three

input channels each containing an 8-bit register. Also inte-

grated on board the part is a reference amplifier and CRT con-

trol functions

BLANK, SYNC and REF WHITE.

Digital Inputs

24-bits of pixel data (color information) R0–R7, G0–G7 and

B0–B7 are latched into the device on the rising edge of each

clock cycle. This data is presented to the three 8-bit DACs and

is then converted to three analog (RGB) output waveforms.

(See Figure 2.)

Three other digital control signals are latched to the analog

video outputs in a similar fashion.

BLANK, SYNC and REF

WHITE are each latched on the rising edge of CLOCK to

maintain synchronization with the pixel data stream.

The

BLANK and SYNC functions allow for the encoding of

these video synchronization signals onto the RGB video output.

This is done by adding appropriately weighted current sources

to the analog outputs, as determined by the logic levels on the

BLANK and SYNC digital inputs. Figure 3 shows the analog

output, RGB video waveform of the ADV7120. The influence

SYNC and BLANK on the analog video waveform is

illustrated.

The REF WHITE control input drives the RGB video outputs

to the white level. This function could be used to overlay a cur-

sor or crosshair onto the RGB video output.

Table I details the resultant effect on the analog outputs of

BLANK, SYNC and REF WHITE.

All these digital inputs are specified to accept TTL logic levels.

Clock Input

The CLOCK input of the ADV7120 is typically the pixel clock

rate of the system. It is also known as the dot rate. The dot rate,

and hence the required CLOCK frequency, will be determined

by the on-screen resolution, according to the following

equation:

Dot Rate = (Horiz: Res)

(Vert Res)

(Refresh Rate)/

(Retrace Factor)

Horiz Res = Number of pixels/line

Vert Res = Number of lines/frame

Refresh Rate = Horizontal scan rate. This is the rate at

which the screen must be refreshed, typi-

cally 60 Hz for a noninterlaced system or

30 Hz for an interlaced system.

Retrace Factor = Total blank time factor. This takes into ac-

count that the display is blanked for a cer-

tain fraction of the total duration of each

frame (e.g., 0.8).

CLOCK

ANALOG OUTPUTS

(IOR, IOG, IOB, I

SYNC

)

DIGITAL INPUTS

(R0-R7, G0-G7, B0-B7;

SYNC, BLANK,

REF WHITE)

DATA

Figure 2. Video Data Input/Output

ADV7120

REV. B

–7–

If we, therefore, have a graphics system with a 1024 × 1024

resolution, a noninterlaced 60 Hz refresh rate and a retrace fac-

tor of 0.8, then:

Dot Rate = 1024 × 1024 × 60/0.8

= 78.6 MHz

The required CLOCK frequency is thus 78.6 MHz.

All video data and control inputs are latched into the ADV7120

on the rising edge of CLOCK, as previously described in the

“Digital Inputs” section. It is recommended that the CLOCK

input to the ADV7120 be driven by a TTL buffer (e.g.,

74F244).

92.5 IRE

7.5 IRE

40 IRE

WHITE LEVEL

BLACK LEVEL

BLANK LEVEL

SYNC LEVEL

19.05 0.714 26.67 1.000

1.44 0.054 9.05 0.340

0 0 7.62 0.286

mA V mA V

RED, BLUE GREEN

NOTES

1. OUTPUTS CONNECTED TO A DOUBLY TERMINATED 75Ω LOAD.

2. V

REF

= 1.235V, R

SET

= 560Ω, I

SYNC

CONNECTED TO IOG.

3. RS-343A LEVELS AND TOLERANCES ASSUMED ON ALL LEVELS.

Figure 3. RGB Video Output Waveform

Video Synchronization and Control

The ADV7120 has a single composite video sync (SYNC) input

control. Many graphics processors and CRT controllers have

the ability of generating horizontal sync (HSYNC), vertical sync

(VSYNC) and composite

SYNC.

In a graphics system which does not automatically generate a

composite

SYNC signal, the inclusion of some additional logic

circuitry will enable the generation of a composite

SYNC signal.

The I

SYNC

current output is typically connected directly to the

IOG output, thus encoding video synchronization information

onto the green video channel. If it is not required to encode sync

information onto the ADV7120’s analog outputs, the

SYNC in-

put should be tied to logic low and the I

SYNC

should be con-

nected to analog ground.

Reference Input

An external 1.23 V voltage reference is required to drive

the ADV7120. The AD589 from Analog Devices is an

ideal choice of reference. It is a two-terminal, low cost,

temperature compensated bandgap voltage reference which

provides a fixed 1.23 V output voltage for input currents

between 50 µA and 5 mA. Figure 4 shows a typical refer-

ence circuit connection diagram. The voltage reference gets

its current drive from the ADV7120’s V

through an on-

board 1 kΩ resistor to the V

REF

pin. A 0.1 µF ceramic ca-

pacitor is required between the COMP pin and V

This is necessary so as to provide compensation for the

internal reference amplifier.

Table I. Video Output Truth Table

IOG IOR, IOB REF DAC

Description (mA)

(mA) WHITE SYNC BLANK Input Data

WHITE LEVEL 26.67 19.05 1 1 1 xxH

WHITE LEVEL 26.67 19.05 0 1 1 FFH

VIDEO video + 9.05 video + 1.44 0 1 1 data

VIDEO to BLANK video + 1.44 video + 1.44 0 0 1 data

BLACK LEVEL 9.05 1.44 0 1 1 00H

BLACK to BLANK 1.44 1.44 0 0 1 00H

BLANK LEVEL 7.62 0 0 1 0 xxH

SYNC LEVEL 0 0 0 0 0 xxH

NOTE

Typical with full-scale IOG = 26.67 mA.

REF

= 1.235 V, R

SET

= 560 Ω, I

SYNC

connected to IOG.

ADV7120

REV. B

–8–

A resistance R

SET

connected between FS ADJUST and GND

determines the amplitude of the output video level according to

the following equations:

IOG (mA) = 12,082

REF

(V)/R

SET

(Ω) (1)

IOR, IOB (mA) = 8,628

REF

(V)/R

SET

(Ω) (2)

SYNC is not being encoded onto the green channel, then

Equation 1 will be similar to Equation 2.

Using a variable value of R

SET

, as shown in Figure 4, allows for

accurate adjustment of the analog output video levels. Use of a

fixed 560 Ω R

SET

resistor yields the analog output levels as

quoted in the specification page. These values also correspond

to the RS-343A video waveform values as shown in Figure 3.

TO DACs

ADV7120*

REF

GND

1kΩ

FS ADJUST

SET

560Ω

500Ω

100Ω

*ADDITIONAL CIRCUITRY, INCLUDING

DECOUPLING COMPONENTS,

EXCLUDED FOR CLARITY

ANALOG POWER PLANE

COMP

0.1µF

AD589

(1.235V

VOLTAGE

REFERENCE)

REF

≈ 4mA

Figure 4. Reference Circuit

D/A Converters

The ADV7120 contains three matched 8-bit D/A converters.

The DACs are designed using an advanced, high speed, seg-

mented architecture. The bit currents corresponding to each

digital input are routed to either the analog output (bit = “1”)

or GND (bit = “0”) by a sophisticated decoding scheme. As all

this circuitry is on one monolithic device, matching between the

three DACs is optimized. As well as matching, the use of identi-

cal current sources in a monolithic design guarantees monoto-

nicity and low glitch. The onboard operational amplifier

stabilizes the full-scale output current against temperature and

power supply variations.

Analog Outputs

The ADV7120 has three analog outputs, corresponding to the red,

green and blue video signals. A fourth analog output (I

SYNC

) can be

used if it is required to encode video synchronization information

onto the green signal. In this case, I

SYNC

is connected to IOG .

(See “Video Synchronization and Control” section.)

The red, green and blue analog outputs of the ADV7102 are

high impedance current sources. Each one of these three RGB

current outputs is capable of directly driving a 37.5 Ω load, such

as a doubly terminated 75 Ω coaxial cable. Figure 5a shows the

required configuration for each of the three RGB outputs con-

nected into a doubly terminated 75 Ω load. This arrangement

will develop RS-343A video output voltage levels across a 75 Ω

monitor.

TERMINATION REPEATED THREE TIMES

FOR RED, GREEN AND BLUE DACs

DACs

IOR, IOG, IOB

(CABLE)

= 75Ω

(SOURCE

TERMINATION)

= 75Ω

(MONITOR)

Figure 5a. Analog Output Termination for RS-343A

One suggested method of driving RS-170 video levels into a 75 Ω

monitor is shown in Figure 5b. The output current levels of the

DACs remain unchanged but the source termination resistance,

, on each of the three DACs is increased from 75 Ω to 150 Ω.

TERMINATION REPEATED THREE TIMES

FOR RED, GREEN AND BLUE DACs

DACs

IOR, IOG, IOB

(CABLE)

= 75Ω

= 150Ω

(SOURCE

TERMINATION)

= 75Ω

(MONITOR)

Figure 5b. Analog Output Termination for RS-170

More detailed information regarding load terminations for vari-

ous output configurations, including RS-343A and RS-170, is

available in an application note entitled “Video Formats & Re-

quired Load Terminations” available from Analog Devices,

publication number E1228-15-1/89.

Figure 3 shows the video waveforms associated with the three

RGB outputs driving the doubly terminated 75 Ω load of Figure

5a. As well as the gray scale levels, black level to white level, the

diagram also shows the contributions of

SYNC and BLANK.

These control inputs add appropriately weighted currents to the

analog outputs, producing the specific output level requirements

for video applications. Table I details how the

SYNC and

BLANK inputs modify the output levels.

Gray Scale Operation

The ADV7120 can be used for stand-alone, gray scale (mono-

chrome) or composite video applications (i.e., only one channel

used for video information). Any one of the three channels, red,

green or blue, can be used to input the digital video data. The

two unused video data channels should be tied to logical zero.

P1-P3 P4-P6 P7-P9 P10-P12 P13-P13

ADV7120KPZ30

Mfr. #:

Buy ADV7120KPZ30

Manufacturer:

Description:

Multimedia ICs Video ICs CMOS 80 MHz Triple 8B DAC

Lifecycle:

New from this manufacturer.

Delivery:

DHL FedEx Ups TNT EMS

Payment:

T/T Paypal Visa MoneyGram Western Union

ADV7120KPZ30

ADV7120KPZ30

Products related to this Datasheet