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16
Table 2. SOIC 8Lead EP Thermal RC Network Models
54 mm
2
717 mm
2
54 mm
2
717 mm
2
Cu Area
Cauer Network Foster Network
C’s C’s Units Tau Tau units
1 2.7E06 2.7E06 Ws/C 1.00E06 1.00E06 sec
2 1.1E05 1.1E05 Ws/C 1.00E05 1.00E05 sec
3 3.2E05 3.2E05 Ws/C 1.00E04 1.00E04 sec
4 1.3E04 1.3E04 Ws/C 9.39E04 9.39E04 sec
5 1.8E03 1.8E03 Ws/C 3.13E03 3.13E03 sec
6 7.9E03 8.3E03 Ws/C 3.30E02 3.30E02 sec
7 2.5E02 3.1E02 Ws/C 6.00E01 6.00E01 sec
8 1.4E01 5.1E01 Ws/C 4.00E+00 4.00E+00 sec
9 4.1E01 2.1E+00 Ws/C 1.16E+01 4.83E+01 sec
10 1.6E+00 6.3E+01 Ws/C 5.58E+01 2.37E+02 sec
R’s R’s R’s R’s
1 0.474 0.474 C/W 0.282 0.282 C/W
2 1.086 1.086 C/W 0.610 0.610 C/W
3 3.011 3.010 C/W 1.929 1.929 C/W
4 5.883 5.874 C/W 5.825 5.825 C/W
5 1.944 1.911 C/W 2.700 2.700 C/W
6 4.655 4.264 C/W 3.000 3.000 C/W
7 21.431 15.678 C/W 15.000 15.000 C/W
8 40.130 9.238 C/W 11.494 7.797 C/W
9 23.392 18.454 C/W 34.982 20.473 C/W
10 24.381 3.581 C/W 50.566 5.953 C/W
NOTE: Bold face items in the Cauer network above, represent the package without the external thermal system. The Bold face items in
the Foster network are computed by the square root of time constant R(t) = 225 * sqrt(time(sec)). The constant is derived based
on the active area of the device with silicon and epoxy at the interface of the heat generation.
The Cauer networks generally have physical significance and may be divided between nodes to separate thermal behavior
due to one portion of the network from another. The Foster networks, though when sorted by time constant (as above) bear
a rough correlation with the Cauer networks, are really only convenient mathematical models. Cauer networks can be easily
implemented using circuit simulating tools, whereas Foster networks may be more easily implemented using mathematical
tools (for instance, in a spreadsheet program), according to the following formula:
R(t) +
n
S
i + 1
R
i
ǒ
1e
tńtau
i
Ǔ
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qJA vs Copper Spreader Area
60
20
80
40
100
0
120
140
0 100 200 300 400 500 600 700 800
qJA (°C/W)
COPPER AREA (mm
2
)
Figure 27. SOIC 8Lead EP qJA as a Function of the
Pad Copper Area Including Traces, Board Material
1 oz
2 oz
0.1
1
10
100
1000
0.000001 0.00001 0.0001 0.001
0.01
0.1
1 10 100 1000
Time (sec)
Cu Area 54 mm
2
, 1 oz
Cu Area 717 mm
2
, 1 oz
R(t) (°C/W)
Figure 28. SOIC 8Lead EP Single Pulse Heating Curve
0.1
1
10
100
0.000001 0.00001 0.0001 0.001
0.01
0.1
1 10 100 1000
Time (sec)
R(t) (°C/W)
Single
50% Duty Cycle
20%
10%
5%
1%
Cu Area 717 mm
2
, 1 oz Cu
Figure 29. SOIC 8Lead Thermal Duty Cycle Curves on 1” Spreader Test Board
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18
Junction
R
1
C
1
C
2
R
2
C
3
R
3
C
n
R
n
Time constants are not simple RC products. Amplitudes
of mathematical solution are not the resistance values.
Ambient
(thermal ground)
Figure 30. Grounded Capacitor Thermal Network (“Cauer” Ladder)
Junction
R
1
C
1
C
2
R
2
C
3
R
3
C
n
R
n
Each rung is exactly characterized by its RCproduct
time constant; amplitudes are the resistances.
Ambient
(thermal ground)
Figure 31. NonGrounded Capacitor Thermal Ladder (“Foster” Ladder)

NCV85081BDS50R4G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
LDO Voltage Regulators 250 MA 5 V LDO
Lifecycle:
New from this manufacturer.
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