MC10H176FN

Semiconductor Components Industries, LLC, 2006
February, 2006 Rev. 7
1 Publication Order Number:
MC10H176/D
MC10H176
Hex D Master−Slave
Flip−Flop
Description
The MC10H176 contains six master slave type D flipflops with a
common clock. This MECL 10H part is a functional/pinout
duplication of the standard MECL 10K family part, with 100%
improvement in clock frequency and propagation delay and no
increase in powersupply current.
Features
Propagation Delay, 1.7 ns Typical
Power Dissipation, 460 mW Typical
Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
Voltage Compensated
MECL 10K Compatible
PbFree Packages are Available*
CLOCKED TRUTH TABLE
DIP
PIN ASSIGNMENT
V
CC1
Q0
Q1
Q2
D0
D1
D2
V
EE
V
CC2
Q5
Q4
Q3
D5
D4
D3
CLOCK
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
* A clock H is a clock transition from
a low to a high state.
C
L
H *
H *
Q
X
L
H
Q
n+1
Q
n
L
H
Pin assignment is for DualinLine Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
*For additional information on our PbFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
CDIP16
L SUFFIX
CASE 620A
MARKING DIAGRAMS*
PDIP16
P SUFFIX
CASE 648
http://onsemi.com
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
SOEIAJ16
CASE 966
16
1
16
1
MC10H176P
AWLYYWWG
1
16
MC10H176L
AWLYYWW
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G= PbFree Package
10H176
ALYWG
PLLC20
FN SUFFIX
CASE 775
20
1
10H176G
AWLYYWW
120
MC10H176
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2
Table 1. MAXIMUM RATINGS
Symbol Characteristic Rating Unit
V
EE
Power Supply (V
CC
= 0) 8.0 to 0 Vdc
V
I
Input Voltage (V
CC
= 0) 0 to V
EE
Vdc
I
out
Output Current Continuous
Surge
50
100
mA
T
A
Operating Temperature Range 0 to +75 °C
T
stg
Storage Temperature Range Plastic
Ceramic
55 to +150
55 to +165
°C
°C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
Table 2. ELECTRICAL CHARACTERISTICS (V
EE
= 5.2 V ±5%) (Note 1)
0° 25° 75°
Symbol Characteristic Min Max Min Max Min Max Unit
I
E
Power Supply Current 123 112 123 mA
I
inH
Input Current High
Pins 5,6,7,10,11,12
Pin 9
425
670
265
420
265
420
mA
I
inL
Input Current Low 0.5 0.5 0.3
mA
V
OH
High Output Voltage 1.02 0.84 0.98 0.81 0.92 0.735 Vdc
V
OL
Low Output Voltage 1.95 1.63 1.95 1.63 1.95 1.60 Vdc
V
IH
High Input Voltage 1.17 0.84 1.13 0.81 1.07 0.735 Vdc
V
IL
Low Input Voltage 1.95 1.48 1.95 1.48 1.95 1.45 Vdc
1. Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is
maintained. Outputs are terminated through a 50 W resistor to 2.0 V.
Table 3. AC PARAMETERS
t
pd
Propagation Delay 0.9 2.1 0.9 2.2 1.0 2.4 ns
t
set
Setup Time 1.5 1.5 1.5 ns
t
hold
Hold Time 0.9 0.9 1.0 ns
t
r
Rise Time 0.5 1.8 0.5 1.9 0.5 2.0 ns
t
f
Fall Time 0.5 1.8 0.5 1.9 0.5 2.0 ns
f
tog
Toggle Frequency 250 250 250 MHz
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
MC10H176
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3
APPLICATION INFORMATION
The MC10H176 contains six highspeed, master slave
type “D” flipflops. Data is entered into the master when the
clock is low. Mastertoslave data transfer takes place on
the positivegoing Clock transition. Thus, outputs may
change only on a positivegoing Clock transition. A change
in the information present at the data (D) input will not affect
the output information any other time due to the
masterslave construction of this device.
V
CC1
= PIN 1
V
CC2
= PIN 16
V
EE
= PIN 8
2 5
CLOCK 9
Q0
3 Q1
4 Q2
13 Q3
14 Q4
15 Q5
D0
6D1
7D2
10D3
11D4
D5
LOGIC DIAGRAM
12

MC10H176FN

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Flip Flops Hexadecimal D-Type
Lifecycle:
New from this manufacturer.
Delivery:
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