Copyright Cirrus Logic, Inc. 2010
(All Rights Reserved)
http://www.cirrus.com
CS5371A
CS5372A
Low-power, High-performance
ΔΣ
Modulators
Features
Fourth-order ΔΣ Architecture
Clock-jitter-tolerant Architecture
Input Voltage: 5 V
pp
Fully Differential
Input Signal Bandwidth: DC to 2 kHz
High Dynamic Range
127 dB SNR @ 215 Hz BW (2 ms sampling)
124 dB SNR @ 430 Hz BW (1 ms sampling)
Low Total Harmonic Distortion
-118 dB THD typical (0.000126%)
Low Power Consumption
Normal operation: 25 mW per channel
Power down: 10 µW per channel
Small Footprint, 24-pin SSOP package
Multi-channel System Support
1-channel System: CS5371A
2-channel System: CS5372A
3-channel System: CS5371A + CS5372A
4-channel System: CS5372A + CS5372A
Bipolar Power Supply Configuration
VA+ = +2.5 V; VA- = -2.5 V; VD = +3.3 V
Description
The CS5371A and CS5372A are one- and two-channel,
high-dynamic-range, fourth-order ΔΣ modulators intend-
ed for geophysical and sonar applications. When
combined with CS3301A / CS3302A differential amplifi-
ers, the CS4373A test DAC and CS5376A digital filter, a
small, low-power, self-testing, high-accuracy, multi-
channel measurement system results.
The modulators have high dynamic range and low total
harmonic distortion with very low power consumption.
They convert differential analog input signals from the
CS3301A / CS3302A amplifiers to an oversampled seri-
al bit stream at 512 kbits per second. This oversampled
bit stream is then decimated by the CS5376A digital filter
to a 24-bit output at the selected output word rate.
In normal operation, power consumption is 5 mA per
channel. Each modulator can be independently powered
down to 500 µA per channel, and by halting the input
clock they will enter a micro-power state using only 2 µA
per channel.
The CS5371A and CS5372A modulators are available in
small 24-pin SSOP packages, providing exceptional per-
formance in a very small footprint.
ORDERING INFORMATION
See page 30.
Clock
Generator
INF1+
VREF+
VREF-
VA+
VA-
VD
GND
PWDN1
MFLAG1
MDATA1
MCLK
MSYNC
MFLAG2
MDATA2
PWDN2
INF1-
INR1-
INR1+
INF2+
INF2-
INR2-
INR2+
4th Order
ΔΣ Modulator
4th Order
ΔΣ Modulator
OFST
CS5372A
Clock
Generator
INF+
VREF+
VREF-
VA+
VA-
VD
GND
PWDN
MFLAG
MDATA
MCLK
MSYNC
INF-
INR-
INR+
4th Order
ΔΣ Modulator
OFST
CS5371A
SEP ‘10
DS748F3
CS5371A CS5372A
2 DS748F3
TABLE OF CONTENTS
1. CHARACTERISTICS AND SPECIFICATIONS ........................................................................ 4
SPECIFIED OPERATING CONDITIONS ................................................................................. 4
ABSOLUTE MAXIMUM RATINGS ........................................................................................... 4
TEMPERATURE CONDITIONS ............................................................................................... 5
ANALOG INPUT CHARACTERISTICS ................................................................................... 5
PERFORMANCE CHARACTERISTICS................................................................................... 6
PERFORMANCE CHARACTERISTICS (CONT.) .................................................................... 7
PERFORMANCE PLOTS ......................................................................................................... 8
DIGITAL CHARACTERISTICS ................................................................................................ 9
DIGITAL CHARACTERISTICS (CONT.) ............................................................................... 10
DIGITAL CHARACTERISTICS (CONT.) ............................................................................ 11
POWER SUPPLY CHARACTERISTICS ................................................................................ 12
2. SYSTEM DIAGRAM ............................................................................................................ 13
3. MODULATOR OPERATION ................................................................................................... 14
3.1 One’s Density ................................................................................................................... 14
3.2 Decimated 24-bit Output .................................................................................................. 15
3.3 Synchronization ............................................................................................................... 15
3.4 Idle Tones ........................................................................................................................15
3.5 Stability ............................................................................................................................ 15
4. ANALOG SIGNALS ................................................................................................................ 16
4.1 INR±, INF± Modulator Inputs ........................................................................................... 16
4.2 Input Impedance .............................................................................................................. 16
4.3 Anti-alias Filter ................................................................................................................. 17
4.4 Analog Differential Signals ............................................................................................... 17
5. DIGITAL SIGNALS .................................................................................................................18
5.1 MCLK Connection ............................................................................................................18
5.2 MSYNC Connection ......................................................................................................... 18
5.3 MDATA Connection ......................................................................................................... 19
5.4 MFLAG Connection ......................................................................................................... 19
5.5 OFST Connection ............................................................................................................19
6. POWER MODES ..................................................................................................................... 20
6.1 Normal Operation ............................................................................................................. 20
6.2 Power Down, MCLK Enabled .......................................................................................... 20
6.3 Power Down, MCLK Disabled .......................................................................................... 20
7. VOLTAGE REFERENCE ........................................................................................................ 21
7.1 VREF Power Supply ........................................................................................................ 21
7.2 VREF RC Filter ................................................................................................................ 21
7.3 VREF PCB Routing ..........................................................................................................21
7.4 VREF Input Impedance .................................................................................................... 21
7.5 VREF Accuracy ................................................................................................................ 22
8. POWER SUPPLIES ................................................................................................................ 23
8.1 Power Supply Bypassing ................................................................................................. 23
8.2 PCB Layers and Routing ................................................................................................. 23
8.3 Power Supply Rejection ................................................................................................... 23
8.4 SCR Latch-up Considerations ......................................................................................... 24
8.5 DC-DC Converters ...........................................................................................................24
9. PIN DESCRIPTION - CS5371A ............................................................................................. 25
10. PIN DESCRIPTION - CS5372A ........................................................................................... 27
11. PACKAGE DIMENSIONS ..................................................................................................... 29
12. ORDERING INFORMATION ................................................................................................ 30
13. ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION .......................... 31
14. REVISION HISTORY ........................................................................................................... 32
CS5371A CS5372A
DS748F3 3
LIST OF FIGURES
Figure 1. Anti-alias Filter Components............................................................................................ 5
Figure 2. Modulator Noise Performance ......................................................................................... 8
Figure 3. Modulator + CS4373A Test DAC Dynamic Performance ................................................ 8
Figure 4. Digital Input Rise and Fall Times .....................................................................................9
Figure 5. Digital Output Rise and Fall Times .................................................................................. 9
Figure 6. System Timing Diagram.................................................................................................11
Figure 7. MCLK / MSYNC Timing Detail....................................................................................... 11
Figure 9. Connection Diagram ...................................................................................................... 13
Figure 8. System Block Diagram................................................................................................... 13
Figure 10. CS5371A and CS5372A Block Diagrams.................................................................... 14
Figure 11. Analog Signals............................................................................................................. 16
Figure 12. Digital Signals .............................................................................................................. 18
Figure 13. Power Mode Diagram .................................................................................................. 20
Figure 14. Voltage Reference Circuit............................................................................................21
Figure 15. Power Supply Diagram ................................................................................................ 23
LIST OF TABLES
Table 1. 24-Bit Output Coding for the CS5371A and CS5372A Modulator and
CS5376A Digital Filter Combination ............................................................................. 15

CS5371A-ISZ

Mfr. #:
Manufacturer:
Cirrus Logic
Description:
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet