NJW1111V-TE1 Datasheet NJW1111V-TE1 | P4-P6

NJW1111

– 4 –

! TERMINAL DESCRIPTION

PIN NO. SYMBOL FUNCTION EQUIVALENT CIRCUIT

TERMINAL

VOLTAGE

1 to 9

32 to 24

InA1 to 9

InB1 to 9

Ach Input 1 to 9

Bch Input 1 to 9

11 to 13

22 to 20

OutA1 to 3

OutB1 to 3

Ach Output 1 to 3

Bch Output 1 to 3

17,18 V

V-,V+ Power Supply Terminal

V-,V+

GND Ground Terminal

LATCH

DATA

CLOCK

ADR

LATCH

DATA

CLOCK

Chip address setting terminal

GND

V-(sub)

200

Ω

V+

50k

Ω

V-(sub)

200

Ω

V+

Ω

V-(sub)

V+

V-(sub)

Ω

V+

x12

V+

V-

NJW1111

– 5 –

! CONTROL DATA FORMAT

(

✴

)

MSB First

SYMBOL PARAMETER MIN TYP MAX UNIT

CLOCK Clock Width

4 - -

µs

CLOCK Pulse Width (High)

2 - -

µs

CLOCK Pulse Width (Low)

2 - -

µs

LATCH Rise Hold Time

4 - -

µs

DATA Setup Time

1.6 - -

µs

DATA Hold Time

1.6 - -

µs

CLOCK Setup Time

1.6 - -

µs

LATCH High Pulse Width

1.6 - -

µs

LATCH

DAT

CLOCK

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

MSB LSB

t7 t1

t2 t3

t4 t8

t5 t6

NJW1111

– 6 –

! CONTROL DATA

NJW1111 control data is constructed with 16bits.

MSB

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

Setting DATA Select Address Chip Address

MSB

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

Gain1 Selector1 0 0 0 0 * * * *

Gain2 Selector2 0 0 0 1 * * * *

Gain3 Selector3 0 0 1 0 * * * *

* Chip address is set by chip address select terminal (ADR) status.

Chip Address

Chip address select

terminal

D3 D2 D1 D0

Low 1 0 1 0

High 1 0 1 1

!INITIAL CONDITION

MSB

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

0 0 0 0 0 0 0 0 0 0 0 0 * * * *

0 0 0 0 0 0 0 0 0 0 0 1 * * * *

0 0 0 0 0 0 0 0 0 0 1 0 * * * *

* Chip address is set by chip address select terminal (ADR) status.

P1-P3 P4-P6 P7-P9 P10-P11

NJW1111V-TE1

Mfr. #:

Buy NJW1111V-TE1

Manufacturer:

NJR (New Japan Radio)

Description:

Audio Amplifiers 9-IN 3-OUT Stereo Audio Selector

Lifecycle:

New from this manufacturer.

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Products related to this Datasheet

NJW1111V-TE1