DS2291/87-22291-000

DS2291
T1 Long Loop Stik
DS2291
* Service mark of AT&T Communications
022798 1/10
FEATURES
Recovers clock and data off of T1 lines from 0 to 6,000
feet in length
+0 to -30dBSX receiver sensitivity
Built-in Automatic Line Build Out (ALBO) circuitry; no
tuning or external components required
Dejitters the recovered clock and data
Meets TR 62411 (Dec. 1990) for jitter tolerance and
attenuation
Companion to the DS2290 T1 Isolation Stik
Connects to a standard 30-pin single in-line
connector
Single +5V supply
Compatible with the DS2180A or DS2141A T1 Trans-
ceivers
DESCRIPTION
The DS2291 T1 Long Loop Stik contains all the circuitry
necessary to recover clock and data from a T1 line. The
DS2291 contains an Automatic Line Build Out (ALBO)
circuit that allows it to adapt to T1 lines varying in length
from 0 to 6,000 feet. It also will dejitter the recovered
clock and data according to the jitter attenuation curves
outlined in AT&T Communications Document TR 62411
(Accunet* T1.5 Service Description and Interface speci-
fication - December 1990). Applications area include
Channel Service Units (CSU), T1 monitoring equip-
ment, and T1 test equipment.
PIN ASSIGNMENT
VDD 1
B8ZS 20
GND 23
VDD 2
LB 9
NC 10
GND 22
RCLK 3
RPOS 4
RNEG 5
LPOS 7
LNEG 8
NC 11
RCL 14
NC 13
BPV 15
RX– 30
RX+ 29
NC 28
NC 27
NC 26
NC 25
DJA 19
NC 18
LOCK 16
NC 12
LCLK 6
BL 17
NC 24
DEJITTER
CIRCUITRY
ALBO & CLOCK
RECOVERY
CIRCUITRY
(ACTUAL SIZE)
RST21
OVERVIEW
The DS2291 contains onboard ALBO circuitry that al-
lows it to recover clock and data from T1 lines up to
6,000 feet in length. (See Figure 1.) Unlike alternative
methods of clock and data recovery from T1 lines, the
DS2291 does not require any tuning, nor does it need
any additional external circuitry. The state of the LOCK
pin indicates whether the DS2291 has been able to
phase and frequency lock to the incoming T1 signal. If
the LOCK pin is high, the DS2291 is properly locked
onto the incoming signal. The DS2291 meets the latest
T1 specification for jitter tolerance. The jitter tolerance
curve in Figure 2 is applicable over the full dynamic in-
put range of the DS2291.
DS2291
022798 2/10
Once the Long Loop Stik has recovered data from the
T1 line, it can decode B8ZS code words and check for
bipolar violations and carrier loss. If the B8ZS pin is tied
high, the DS2291 will automatically replace incoming
B8ZS code words with eight zeros. If the B8ZS pin is tied
low or left open, no replacement occurs. Bipolar viola-
tions are reported via the BPV pin. The BPV pin will tran-
sition high for a full T1 bit period (648 ns) each time a vio-
lation is detected. Bipolar violations inherent in B8ZS
code words are not reported if the B8ZS pin is tied high.
The DS2291 also checks for carrier loss. The RCL pin
will transition high when the DS2291 detects 192 con-
secutive zeros at RX+ and RX-.
The recovered clock and data are passed to the dejitter
circuitry. If the DJA is tied low or left open, the DS2291
will attenuate the jitter present at RX+ and RX- accord-
ing to the curves outlined in Figure 3. These curves
meet the latest T1 specifications. If the DJA pin is tied
high, the DS2291 will not attenuate jitter. Hence, all the
jitter inherent in the signal at RX+ and RX- will be passed
to RCLK, RPOS, and RNEG. If the recovered clock at
RCLK is used to transmit data onto T1 lines, it is recom-
mended that the dejitter circuitry be enabled (DJA = 0).
The dejitter circuitry contains a 128-bit buffer. This buffer
can be recentered on command via the RST
pin. In nor-
mal applications, the RST is left open or tied high. The
Buffer Limit (BL) output will transition high when the
DS2291 is receiving more than 120 unit intervals
peak-to-peak (Ulpp) of jitter at RX+ and RX-. As long as
the incoming jitter is less than 120Ulpp, the BL pin will
remain low.
The DS2291 contains a data mux that allows data to be
routed from either the T1 recovery circuitry or from a lo-
cal source. The mux is helpful locating faults in a sys-
tem. For example, it could be used to implement a “local”
loopback.
Two typical applications with the DS2291 are shown in
Figure 4 and Figure 5. In both applications, the DS2291
is used to recover data from T1 lines up to 6,000 feet in
length. The application in Figure 4 is with an unpro-
tected interface; it might be used in T1 test equipment.
The application in Figure 5 is with the DS2290 T1 Isola-
tion Stik, which provides all the necessary protection as
required by FCC Part 68. This could be used in a Chan-
nel Service Unit (CSU) or in similar types of equipment
in which full surge and isolation protection is required.
SINGLE IN-LINE CONNECTOR
The DS2291 is designed to connect directly into a
30-pin single in-line connector. These connectors are
available from a number of vendors.
DS2291
022798 3/10
PIN DESCRIPTION Table 1
PIN SYMBOL I/O DESCRIPTION
1,2 V
DD
- Positive Supply. 5.0 volts.
3 RCLK O Receive Clock. Recovered 1.544 MHz clock.
4
5
RPOS
RNEG
O Receive Bipolar Data. Recovered bipolar data; updated on the
rising edge of RCLK. Bipolar violations are not corrected.
6 LCLK I Loopback Clock. Clock for loopback data. Internally pulled low
by 100K ohm.
7
8
LPOS
LNEG
I Loopback Bipolar Data. Samples on the falling edge of LCLK
if LB is tied high. Internally pulled low by 100K ohm.
9 LB I Loopback Enable. Tie high to loopback data from the LPOS
and LNEG inputs to RPOS and RNEG; tie low or leave open to
obtain recovered data out of the ALBO circuitry at RPOS and
RNEG. Internally pulled low by 100K ohm.
14 RCL O Receive Carrier Loss. Transitions high when 192 consecutive
zeros have been received at RX+ and RX-; reset on the next
ones occurrence.
15 BPV O Receive Bipolar Violation. Transitions high for a full bit period
when a bipolar violation appears at RX+ and RX-. B8ZS code
words are not reported if B8ZS is tied high.
16 LOCK O Lock Indication. High state indicates that the recovery circuit is
phase-and frequency-locked to the signal at RX+ and RX-.
17 BL O Buffer Limit. Transitions high when the incoming jitter at RX+
and RX- is greater than 120Ulpp.
19 DJA I Disable Jitter Attenuation. Tie high to disable the jitter attenu-
ation circuitry; tie low to enable the jitter attenuation circuitry.
Internally pulled low by 100K ohm.
20 B8ZS I B8ZS Enable. If tied high, incoming B8ZS code words are de-
coded and replaced with eight zeros. If tied low, B8ZS code
words are not decoded. Internally pulled low by 100K ohm.
21 RST I Reset. Active low; a high-low-high transition will recenter the
dejitter buffer. Internally pulled high by 100K ohm.
22, 23 GND - Ground. 0.0 volts.
29
30
RX+
RX-
I
O
Receive Analog Input. Connects to T1 line through a 2:1 trans-
former. See Figure 4.
NOTE:
Do not connect any signal to pins 10, 11, 12, 13, 18, 24, 25, 26, 27, or 28.

DS2291/87-22291-000

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Other Modules T1 Long Loop Stik
Lifecycle:
New from this manufacturer.
Delivery:
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