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From a known power dissipated in the power MOSFET, its
junction temperature can be obtained using the following
formula:
T
J
= T
A
+ PR
TH(JA)
The R
TH(JA)
to be used in the equation normally includes
the R
TH(JC)
for the device plus the thermal resistance from
the case to the ambient temperature (R
TH(JC)
). This value
of T
J
can then be compared to the original, assumed value
used in the iterative calculation process.
diode to be effective, the inductance between it and the
synchronous switch must be as small as possible, mandat
-
ing that these components be placed adjacently.
INTV
CC
Regulator
An internal P-channel low dropout regulator produces 5V
at the INTV
CC
pin from the V
IN
supply pin. INTV
CC
powers
the drivers and internal circuitry within the LT3791. The
INTV
CC
pin regulator can supply a peak current of 67mA
and must be bypassed to ground with a minimum of 4.7µF
ceramic capacitor or low ESR electrolytic capacitor. An
additional 0.1µF ceramic capacitor placed directly adjacent
to the INTV
CC
and PGND IC pins is highly recommended.
Good bypassing is necessary to supply the high transient
current required by MOSFET
gate drivers.
Higher
input voltage applications in which large MOSFETs
are being driven at high frequencies may cause the maxi
-
mum junction temperature rating for the LT3791 to be
exceeded. The system
supply current is normally dominated
by the gate charge current. Additional external loading of
the INTV
CC
also needs to be taken into account for the
power dissipation calculations. Power dissipation for the
IC in this case is V
IN
I
INTVCC
, and overall efficiency is
lowered. The junction temperature can be estimated by
using the equations given
T
J
= T
A
+ (P
D
θ
JA
)
where θ
JA
(in °C/W) is the package thermal impedance.
For example, a typical application operating in continuous
current operation might draw 24mA from a 24V supply:
T
J
= 70°C + 24mA • 24V • 28°C/W = 86°C
To prevent maximum junction temperature from being
exceeded, the input supply current must be checked
operating in continuous mode at maximum V
IN
.
Figure 10. Normalized R
DS(ON)
vs Temperature
JUNCTION TEMPERATURE (°C)
–50
ρ
T
NORMALIZED ON-RESISTANCE (Ω)
1.0
1.5
150
3791 F10
0.5
0
0
50
100
2.0
Optional Schottky Diode (D3, D4) Selection
The Schottky diodes D3 and D4 shown in the Typical Ap-
plications section
conduct during the dead time between
the conduction of the power MOSFET switches. They
are intended to prevent the body diode of synchronous
switches M2 and M4 from turning on and storing charge
during the dead time. In particular, D4 significantly reduces
reverse-recovery current between switch M4 turn-off and
switch M3 turn-on, which improves converter efficiency
and reduces switch M3 voltage stress. In order for the
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Top Gate (TG) MOSFET Driver Supply (C1, D1, C2, D2)
The external bootstrap capacitors C1 and C2 connected
to the BST1 and BST2 pins supply the gate drive voltage
for the topside MOSFET switches M1 and M4. When the
top MOSFET switch M1 turns on, the switch node SW1
rises to V
IN
and the BST1 pin rises to approximately V
IN
+
INTV
CC
. When the bottom MOSFET switch M2 turns on, the
switch node SW1 drops low and the bootstrap capacitor
C1 is charged through D1 from INTV
CC
. When the bottom
MOSFET switch M3 turns on, the switch node SW2 drops
low and the bootstrap capacitor C2, is charged through D2
from INTV
CC
. The bootstrap capacitors C1 and C2 need to
store about 100 times the gate charge required by the top
MOSFET switch M1 and M4. In most applications a 0.1µF
to 0.47µF, X5R or X7R ceramic capacitor is adequate.
Efficiency Considerations
The power efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Although all
dissipative
elements in circuits produce losses, four main sources
account for most of the losses in LT3791 circuits:
1. DC I
2
R losses. These arise from the resistances of the
MOSFETs, sensing resistor, inductor and PC board
traces and cause the efficiency to drop at high output
currents.
2. Transition loss. This loss arises from the brief amount
of time switch M1 or switch M3 spends in the saturated
region during switch node transitions. It depends upon
the input voltage, load current, driver strength and
MOSFET capacitance, among other factors. The loss
is significant at input voltages above 20V and can be
estimated from:
Transition Loss ≈ 2.7 • V
IN
2
I
OUT
C
RSS
f
where C
RSS
is the reverse-transfer capacitance.
3. INTV
CC
current. This is the sum of the MOSFET driver
and control currents.
4. C
IN
and C
OUT
loss. The input capacitor has the difficult
job of filtering the large RMS input current to the regu-
lator in
buck operation. The output capacitor has the
difficult
job of filtering the large RMS output current
in boost operation. Both C
IN
and C
OUT
are required to
have low ESR to minimize the AC I
2
R loss and sufficient
capacitance to prevent the RMS current from causing
additional upstream losses in fuses or batteries.
5.
Other losses. Schottky diode D3 and D4 are respon
-
sible for conduction losses during dead time and light
load conduction periods. Inductor core loss occurs
predominately at light loads. Switch M3 causes reverse
recovery current loss in boost operation.
When making adjustments to improve efficiency, the input
current is the best indicator of changes in efficiency. If you
make a change and the input current decreases, then the
efficiency has increased. If there is no change in the input
current, then there is no change in efficiency.
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PC Board Layout Checklist
The basic PC board layout requires a dedicated ground
plane layer. Also, for high current, a multilayer board
provides heat sinking for power components.
n
The PGND ground plane layer should not have any traces
and it should be as close as possible to the layer with
power MOSFETs.
n
Place C
IN
, switch M1, switch M2 and D1 in one compact
area. Place C
OUT
, switch M3, switch M4 and D2 in one
compact area.
n
Use immediate vias to connect the components (includ-
ing the LT3791’s SGND and PGND pins) to the ground
plane.
Use several large vias for each power component.
n
Use planes for V
IN
and V
OUT
to maintain good voltage
filtering and to keep power losses low.
n
Flood all unused areas on all layers with copper. Flooding
with copper will reduce the temperature rise of power
components. Connect the copper areas to any DC net
(V
IN
or PGND).
n
Separate the signal and power grounds. All small-signal
components should return to the SGND pin at one point,
which is then tied to the PGND pin close to the sources
of switch M2 and switch M
3.
n
Place switch M2 and switch M3 as close to the control-
ler as possible, keeping the PGND, BG and SW traces
short.
n
Keep the high dV/dT SW1, SW2, BST1, BST2, TG1 and
TG2 nodes away from sensitive small-signal nodes.
n
The path formed by switch M1, switch M2, D1 and the
C
IN
capacitor should have short leads and PC trace
lengths. The path formed by switch M3, switch M4, D2
and the C
OUT
capacitor also should have short leads
and PC trace lengths.
n
The output capacitor (–) terminals should be connected
as close as possible to the (–) terminals of the input
capacitor.
n
Connect the top driver bootstrap capacitor, C1, closely
to the BST1 and SW1 pins. Connect the top driver
bootstrap capacitor, C2, closely to the BST2 and SW2
pins.
n
Connect the input capacitors, C
IN
, and output capacitors,
C
OUT
, closely to the power MOSFETs. These capaci-
tors carry the MOSFET AC current in boost and buck
operation.
n
Route SNSN and SNSP leads together with minimum
PC trace spacing. Avoid sense lines pass through noisy
areas, such as switch nodes. Ensure accurate current
sensing with Kelvin connections at the SENSE resistor.
n
Connect the V
C
pin compensation network close to the
IC, between V
C
and the signal ground pins. The capaci-
tor helps to filter the effects of PCB noise and output
voltage ripple voltage from the compensation loop.
n
Connect the INTV
CC
bypass capacitor, C
VCC
, close to the
IC, between the INTV
CC
and the power ground pins. This
capacitor carries the MOSFET drivers’ current peaks. An
additional 0.1µF ceramic capacitor placed immediately
next to the INTV
CC
and PGND pins can help improve
noise performance substantially.

LT3791MPFE#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
LED Lighting Drivers 60V 4-Switch Sync Buck-Boost LED Drvr Cn
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