662M-03LF

DATASHEET
HDTV AUDIO/VIDEO CLOCK SOURCE ICS662-03
IDT™ / ICS™
HDTV AUDIO/VIDEO CLOCK SOURCE 1
ICS662-03 REV G 051310
Description
The ICS662-03 provides synchronous clock generation for
audio sampling clock rates derived from an HDTV stream.
The device uses the latest PLL technology to provide
superior phase noise and long term jitter performance. The
device also supports a 27 MHz output clock for video
MPEG applications from an HDTV reference clock.
Please contact IDT if you have a requirement for an input
and output frequency not included here.
Features
Packaged in 8-pin SOIC
Pb (lead) free package, RoHS compliant
HDTV clock input
Low phase noise
Exact (0 ppm) multiplication ratios
Support for 256 and 384 times sampling rate
Supports 27 MHz output for video (MPEG)
Block Diagram
PLL
Clock
Synthesis
CLK
REF_IN
Control
Circuitry
GND
VDD
SEL3:0
ICS662-03
HDTV AUDIO/VIDEO CLOCK SOURCE CLOCK SYNTHESIZER
IDT™ / ICS™
HDTV AUDIO/VIDEO CLOCK SOURCE 2
ICS662-03 REV G 051310
Pin Assignment
8 pin (150 mil) SOIC
Output Clock Selection Table
Pin Descriptions
REF_IN
VDD
GND
S3
S2
S1
CLK
S01
2
3
4
8
7
6
5
S3 S2 S1 S0
Input
Frequency
(MHz)
Output
Frequency
(MHz)
000074.175824 8.192
000174.175824
11.2896
001074.175824
12.288
001174.175824
24.576
010074.175824
16.9344
010174.175824
18.432
011074.175824
36.864
011174.175824
27
1000 74.25 8.192
1001 74.25 11.2896
1010 74.25 12.288
1011 74.25 24.576
1100 74.25 16.9344
1101 74.25 18.432
1110 74.25 36.864
1111 74.25 27
Pin
Number
Pin
Name
Pin
Type
Pin Description
1 REF_IN Input Connect this pin to a HDTV clock input.
2 VDD Power Connect to +3.3 V.
3 GND Power Connect to ground.
4 S2 Input Output frequency selection. Determines output frequency per table above. On chip pull-up.
5 CLK Output Clock output.
6 S1 Input Output frequency selection. Determines output frequency per table above. On chip pull-up.
7 S3 Input Output frequency selection. Determines output frequency per table above. On chip pull-up.
8 S0 Input Output frequency selection. Determines output frequency per table above. On chip pull-up.
ICS662-03
HDTV AUDIO/VIDEO CLOCK SOURCE CLOCK SYNTHESIZER
IDT™ / ICS™
HDTV AUDIO/VIDEO CLOCK SOURCE 3
ICS662-03 REV G 051310
Application Information
Series Termination Resistor
Clock output traces should use series termination. To series
terminate a 50 trace (a commonly used trace impedance),
place a 33 resistor in series with the clock line, as close to
the clock output pin as possible. The nominal impedance of
the clock output is 20.
Decoupling Capacitors
As with any high performance mixed-signal IC, the
ICS662-03 must be isolated from system power supply
noise to perform optimally.
Decoupling capacitors of 0.01µF must be connected
between VDD (pin 2) and the PCB ground plane (pin 3).
PCB Layout Recommendations
For optimum device performance and lowest output phase
noise, the following guidelines should be observed.
1) Each 0.01µF decoupling capacitor should be mounted on
the component side of the board as close to the VDD pin as
possible. No vias should be used between decoupling
capacitor and VDD pin. The PCB trace to VDD pin should
be kept as short as possible, as should the PCB trace to the
ground via. Distance of the ferrite bead and bulk decoupling
from the device is less critical.
2) To minimize EMI and obtain the best signal integrity, the
33 series termination resistor should be placed close to
the clock output.
3) An optimum layout is one with all components on the
same side of the board, minimizing vias through other signal
layers (the ferrite bead and bulk decoupling capacitor can be
mounted on the back). Other signal traces should be routed
away from the ICS662-03. This includes signal traces just
underneath the device, or on layers adjacent to the ground
plane layer used by the device.
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS662-03. These ratings, which are
standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these
or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range.
Recommended Operation Conditions
Item Rating
Supply Voltage, VDD 5.5 V
All Inputs and Outputs -0.5 V to VDD+0.5 V
Ambient Operating Temperature 0 to +70° C
Storage Temperature -65 to +150° C
Junction Temperature 125° C
Soldering Temperature 260° C
Parameter Min. Typ. Max. Units
Ambient Operating Temperature 0 +70 ° C
Power Supply Voltage (measured in respect to GND) +3.0 +3.6 V

662M-03LF

Mfr. #:
Manufacturer:
IDT
Description:
Clock Generators & Support Products HDTV AUDIO/VIDEO CLOCK SOURCE
Lifecycle:
New from this manufacturer.
Delivery:
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