LT3430/LT3430-1
7
34301fa
BLOCK DIAGRAM
The LT3430/LT3430-1 are constant frequency, current
mode buck converters. This means that there is an in-
ternal clock and two feedback loops that control the duty
cycle of the power switch. In addition to the normal error
amplifi er, there is a current sense amplifi er that monitors
switch current on a cycle-by-cycle basis. A switch cycle
starts with an oscillator pulse which sets the R
S
ip-fl op
to turn the switch on. When switch current reaches a level
set by the inverting input of the comparator, the fl ip-fl op
is reset and the switch turns off. Output voltage control is
obtained by using the output of the error amplifi er to set
the switch current trip point. This technique means that the
error amplifi er commands current to be delivered to the
output rather than voltage. A voltage fed system will have
low phase shift up to the resonant frequency of the inductor
and output capacitor, then an abrupt 180° shift will occur.
The current fed system will have 90° phase shift at a much
lower frequency, but will not have the additional 90° shift
until well beyond the LC resonant frequency. This makes
it much easier to frequency compensate the feedback loop
and also gives much quicker transient response.
Most of the circuitry of the LT3430/LT3430-1 operates
from an internal 2.9V bias line. The bias regulator normally
draws power from the regulator input pin, but if the BIAS
pin is connected to an external voltage equal to or higher
than 3V, bias power will be drawn from the external source
(typically the regulated output voltage). This will improve
effi ciency if the BIAS pin voltage is lower than regulator
input voltage.
High switch effi ciency is attained by using the BOOST pin
to provide a voltage to the switch driver which is higher
than the input voltage, allowing switch to be saturated.
This boosted voltage is generated with an external ca-
pacitor and diode. Two comparators are connected to the
shutdown pin. One has a 2.38V threshold for undervoltage
lockout and the second has a 0.4V threshold for complete
shutdown.
+
+
+
+
Σ
V
IN
3, 4
2.9V BIAS
REGULATOR
200kHz: LT3430
100kHz: LT3430-1
OSCILLATOR
FREQUENCY
FOLDBACK
2, 5
FB
SW
GND
1, 8, 9, 16, 17
3430 F01
SLOPE COMP
ANTISLOPE COMP
BIAS
INTERNAL
V
CC
SYNC
0.4V
5.5µA
CURRENT
COMPARATOR
R
LIMIT
R
SENSE
ERROR
AMPLIFIER
g
m
= 2000µMho
Q2
FOLDBACK
CURRENT
LIMIT
CLAMP
BOOST
R
S
FLIP-FLOP
DRIVER
CIRCUITRY
S
R
Q1
POWER
SWITCH
1.22V
10
14
SHDN
15
6
12
11
V
C
LOCKOUT
COMPARATOR
SHUTDOWN
COMPARATOR
2.38V
×1
Q3
V
C(MAX)
CLAMP
Figure 1. LT3430/LT3430-1 Block Diagram
LT3430/LT3430-1
8
34301fa
FEEDBACK PIN FUNCTIONS
The feedback (FB) pin on the LT3430/LT3430-1 is used to
set output voltage and provide several overload protection
features. The fi rst part of this section deals with selecting
resistors to set output voltage and the second part talks
about foldback frequency and current limiting created by
the FB pin. Please read both parts before committing to
a fi nal design.
The suggested value for the LT3430 output divider resistor
(see Figure 2) from FB to ground (R2) is 5k or less, and a
formula for R1 is shown below. For the LT3430-1, choose
the resistors so that the Thevinin resistance of the divider
at the feedback pin is 7.5kΩ. The output voltage error
caused by ignoring the input bias current on the FB pin
is less than 0.25% with R2 = 5k. A table of standard 1%
values is shown in Table 1 for common output voltages.
Please read the following if divider resistors are increased
above the suggested values.
R
RV
OUT
1
2122
122
=
()
.
.
APPLICATIONS INFORMATION
average current through the diode and inductor is equal
to the short-circuit current limit of the switch (typically
4A for the LT3430/LT3430-1, folding back to less than
2A). Minimum switch on time limitations would prevent
the switcher from attaining a suffi ciently low duty cycle if
switching frequency were maintained at 200kHz (100kHz
LT3430-1), so frequency is reduced by about 5:1 (3:1
LT3430-1) when the feedback pin voltage drops below
0.8V (see Frequency Foldback graph). This does not affect
operation with normal load conditions; one simply sees
a gear shift in switching frequency during start-up as the
output voltage rises.
In addition to lower switching frequency, the LT3430/
LT3430-1 also operate at lower switch current limit when
the feedback pin voltage drops below 0.6V. Q2 in Figure 2
performs this function by clamping the V
C
pin to a voltage
less than its normal 2.1V upper clamp level. This foldback
current limit greatly reduces power dissipation in the IC,
diode and inductor during short-circuit conditions. External
synchronization is also disabled to prevent interference
with foldback operation. Again, it is nearly transparent to
the user under normal load conditions. The only loads that
may be affected are current source loads which maintain
full load current with output voltage less than 50% of
nal value. In these rare situations the feedback pin can
be clamped above 0.6V with an external diode to defeat
foldback current limit. Caution: clamping the feedback
pin means that frequency shifting will also be defeated,
so a combination of high input voltage and dead shorted
output may cause the LT3430/LT3430-1 to lose control
of current limit.
The internal circuitry which forces reduced switching
frequency also causes current to fl ow out of the feedback
pin when output voltage is low. The equivalent circuitry
is shown in Figure 2. Q1 is completely off during normal
operation. If the FB pin falls below 0.8V, Q1 begins to
conduct current and LT3430 reduces frequency at the rate
of approximately 1.4kHz/µA. To ensure adequate frequency
foldback (under worst-case short-circuit conditions), the
external divider Thevinin resistance (R
THEV
) must be low
enough to pull 115µA out of the FB pin with 0.44V on
the pin (R
THEV
≤ 3.8k)(LT3430-1 R
THEV
7.5k). The net
result is that reductions in frequency and current limit
are affected by output voltage divider impedance. Cau-
Table 1. *LT3430, **LT3430-1
OUTPUT
VOLTAGE
(V)
R2
(kΩ)
R1
(NEAREST 1%)
(kΩ)
% ERROR AT OUTPUT
DUE TO DISCREET 1%
RESISTOR STEPS
3* 4.99 7.32 +0.32
3.3* 4.99 8.45 –0.43
5* 4.99 15.4 –0.30
12* 4.12 46.4 –0.27
3** 12.7 18.7 +0.54
3.3** 12.1 20.5 –0.40
5** 10 30.9 –0.20
12** 8.25 73.2 +0.37
More Than Just Voltage Feedback
The feedback pin is used for more than just output voltage
sensing. It also reduces switching frequency and current
limit when output voltage is very low (see the Frequency
Foldback graph in Typical Performance Characteristics).
This is done to control power dissipation in both the IC
and in the external diode and inductor during short-cir-
cuit conditions. A shorted output requires the switching
regulator to operate at very low duty cycles, and the
LT3430/LT3430-1
9
34301fa
APPLICATIONS INFORMATION
tion should be used if resistors are increased beyond the
suggested values and short-circuit conditions occur with
high input voltage. High frequency pickup will increase
and the protection accorded by frequency and current
foldback will decrease.
Choosing the Inductor
For most applications, the output inductor will fall into
the range of 5µH to 47µH (10µH to 100µH for LT3430-1).
Lower values are chosen to reduce physical size of the
inductor. Higher values allow more output current because
they reduce peak current seen by the LT3430/LT3430-1
switch, which has a 3A limit. Higher values also reduce
output ripple voltage.
When choosing an inductor you will need to consider
output ripple voltage, maximum load current, peak induc-
tor current and fault current in the inductor. In addition,
other factors such as core and copper losses, allowable
component height, EMI, saturation and cost should also
be considered. The following procedure is suggested
as a way of handling these somewhat complicated and
confl icting requirements.
Output Ripple Voltage
Figure 3 shows a comparison of output ripple voltage for
the LT3430/LT3430-1 using either a tantalum or ceramic
output capacitor. It can be seen from Figure 3 that output
ripple voltage can be signifi cantly reduced by using the
ceramic output capacitor; the signifi cant decrease in out-
put ripple voltage is due to the very low ESR of ceramic
capacitors.
Output ripple voltage is determined by ripple current (I
LP-P
)
through the inductor and the high frequency impedance of
the output capacitor. At high frequencies, the impedance
of the tantalum capacitor is dominated by its effective
series resistance (ESR).
Tantalum Output Capacitor
The typical method for reducing output ripple voltage
when using a tantalum output capacitor is to increase the
inductor value (to reduce the ripple current in the inductor).
The following equations will help in choosing the required
++
1.2V
BUFFER
V
SW
L1
V
C
GND
TO SYNC CIRCUIT
3430 F02
TO FREQUENCY
SHIFTING
R3
1k
R4
2k
R1
C1
R2
OUTPUT
5V
ERROR
AMPLIFIER
FB
1.4V
Q1
LT3430
Q2
+
Figure 2. Frequency and Current Limit Foldback
Figure 3. LT3430 Output Ripple Voltage Waveforms.
Ceramic vs Tantalum Output Capacitors
V
IN
= 40V
V
OUT
= 5V
L = 22µH
3430 F03
2µs/DIV
20mV/DIV
V
OUT
USING
100µF CERAMIC
OUTPUT
CAPACITOR
V
OUT
USING
100µF 0.08
TANTALUM
OUTPUT
CAPACITOR
20mV/DIV

LT3430EFE#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Hi V, 3A, 200kHz Buck Sw Reg
Lifecycle:
New from this manufacturer.
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