MAX9750/MAX9751/MAX9755
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
______________________________________________________________________________________ 19
Headphone Amplifier
In conventional single-supply headphone amplifiers,
the output-coupling capacitor is a major contributor of
audible clicks and pops. Upon startup, the amplifier
charges the coupling capacitor to its bias voltage, typi-
cally half the supply. Likewise, during shutdown, the
capacitor is discharged to GND. A DC shift across the
capacitor results, which in turn appears as an audible
transient at the speaker. Since the MAX9750/MAX9751/
MAX9755 do not require output-coupling capacitors, no
audible transient occurs.
Additionally, the MAX9750/MAX9751/MAX9755 features
extensive click-and-pop suppression that eliminates
any audible transient sources internal to the device.
The Turn-On Response (Headphone Mode) and Turn-
Off Response (Headphone Mode) graphs in the
Typical
Operating Characteristics
shows that there are minimal
transient components in the audible range at the output
upon startup and shutdown.
Figure 7a. Volume Control Transfer Function
-80
-60
-70
-40
-50
-20
-30
-10
10
0
20
0 1.0 1.50.5 2.0 2.5 3.0 3.5 4.0
MAX9750A
VOLUME CONTROL TRANSFER FUNCTION
V
VOL
(V)
GAIN (dB)
AUDIO
TAPER POT
GAIN1 = GAIN2 = 0
SPEAKER MODE
HEADPHONE MODE
Figure 7b. Volume Control Transfer Function
-80
-60
-70
-40
-50
-20
-30
-10
10
0
20
0 1.0 1.50.5 2.0 2.5 3.0 3.5 4.0
MAX9750B
VOLUME CONTROL TRANSFER FUNCTION
V
VOL
(V)
GAIN (dB)
AUDIO
TAPER POT
GAIN1 = GAIN2 = 0
SPEAKER MODE
HEADPHONE MODE
Figure 7c. Volume Control Transfer Function
-80
-60
-70
-40
-50
-20
-30
-10
10
0
20
0 1.0 1.50.5 2.0 2.5 3.0 3.5 4.0
MAX9750C
VOLUME CONTROL TRANSFER FUNCTION
V
VOL
(V)
GAIN (dB)
AUDIO
TAPER POT
GAIN1 = GAIN2 = 0
SPEAKER MODE
HEADPHONE MODE
MAX9750
R
B3
47kΩ
BEEP
0.47μF
SOURCE 3
R
B2
47kΩ
0.47μF
SOURCE 2
R
B1
47kΩ
0.47μF
SOURCE 1
R
INT
47kΩ
BIAS
WINDOW
DETECTOR
(0.8V
P-P
THRESHOLD)
SPEAKER/HEADPHONE
AMPLIFER INPUTS
V
OUT(BEEP)
FREQUENCY
DETECTOR
(300Hz THRESHOLD)
Figure 8. BEEP Input
MAX9750/MAX9751/MAX9755
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
20 ______________________________________________________________________________________
Applications Information
BTL Speaker Amplifiers
The MAX9750/MAX9751/MAX9755 feature speaker
amplifiers designed to drive a load differentially, a con-
figuration referred to as bridge-tied load (BTL). The BTL
configuration (Figure 9) offers advantages over the sin-
gle-ended configuration, where one side of the load is
connected to ground. Driving the load differentially
doubles the output voltage compared to a single-
ended amplifier under similar conditions. Thus, the
device’s differential gain is twice the closed-loop gain
of the input amplifier. The effective gain is given by:
Substituting 2 x V
OUT(P-P)
into the following equation
yields four times the output power due to double the
output voltage:
Since the differential outputs are biased at midsupply,
there is no net DC voltage across the load. This elimi-
nates the need for DC-blocking capacitors required for
single-ended amplifiers. These capacitors can be large
and expensive, can consume board space, and can
degrade low-frequency performance.
Power Dissipation and Heat Sinking
Under normal operating conditions, the MAX9750/
MAX9751/MAX9755 can dissipate a significant amount
of power. The maximum power dissipation for each
package is given in the
Absolute Maximum Ratings
under Continuous Power Dissipation, or can be calcu-
lated by the following equation:
where T
J(MAX)
is +150°C, T
A
is the ambient tempera-
ture, and θ
JA
is the reciprocal of the derating factor in
°C/W as specified in the
Absolute Maximum Ratings
section. For example, θ
JA
of the thin QFN package is
+42°C/W. For optimum power dissipation, the exposed
paddle of the package should be connected to the
ground plane (see the
Layout and Grounding
section).
Output Power (Speaker Amplifier)
The increase in power delivered by the BTL configura-
tion directly results in an increase in internal power dis-
sipation over the single-ended configuration. The
maximum power dissipation for a given V
DD
and load is
given by the following equation:
If the power dissipation for a given application exceeds
the maximum allowed for a given package, either reduce
V
DD
, increase load impedance, decrease the ambient
temperature, or add heatsinking to the device. Large
output, supply, and ground PC board traces improve the
maximum power dissipation in the package.
P
V
R
DISS MAX
DD
L
()
=
2
2
2
π
P
TT
DISSPKG MAX
J MAX A
JA
()
()
=
θ
V
V
P
V
R
RMS
OUT P P
OUT
RMS
L
=
=
()
22
2
A
R
R
VD
F
IN
2
+1
V
OUT(P-P)
2 x V
OUT(P-P)
V
OUT(P-P)
-1
Figure 9. Bridge-Tied Load Configuration
OUTPUT POWER (mW)
THD+N (%)
125100755025
0.01
0.1
1
10
100
1000
0.001
0 150
V
DD
= 5V
R
L
= 16Ω
A
V
= 3dB
OUTPUTS IN PHASE
OUTPUTS 180° OUT OF PHASE
Figure 10. Total Harmonic Distortion Plus Noise vs. Output Power
with Inputs In/Out of Phase (Headphone Mode)
MAX9750/MAX9751/MAX9755
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
______________________________________________________________________________________ 21
Thermal-overload protection limits total power dissipa-
tion in these devices. When the junction temperature
exceeds +160°C, the thermal-protection circuitry dis-
ables the amplifier output stage. The amplifiers are
enabled once the junction temperature cools by 15°C.
This results in a pulsing output under continuous ther-
mal-overload conditions as the device heats and cools.
Output Power (Headphone Amplifier)
The headphone amplifiers have been specified for the
worst-case scenario—when both inputs are in phase.
Under this condition, the drivers simultaneously draw
current from the charge pump, leading to a slight loss in
headroom of V
SS
. In typical stereo audio applications,
the left and right signals have differences in both magni-
tude and phase, subsequently leading to an increase in
the maximum attainable output power. Figure 10 shows
the two extreme cases for in and out of phase. In reality,
the available power lies between these extremes.
Power Supplies
The MAX9750/MAX9751/MAX9755 have different sup-
plies for each portion of the device, allowing for the opti-
mum combination of headroom and power dissipation
and noise immunity. The speaker amplifiers are pow-
ered from PV
DD
. PV
DD
ranges from 4.5V to 5.5V. The
headphone amplifiers are powered from HPV
DD
and
V
SS
. HPV
DD
is the positive supply of the headphone
amplifiers and ranges from 3V to 5.5V. V
SS
is the nega-
tive supply of the headphone amplifiers. Connect V
SS
to
CPV
SS
. The charge pump is powered by CPV
DD
.
CPV
DD
ranges from 3V to 5.5V and should be the same
potential as HPV
DD
. The charge pump inverts the volt-
age at CPV
DD
, and the resulting voltage appears at
CPV
SS
. The remainder of the device is powered by V
DD
.
Component Selection
Input Filtering
The input capacitor (C
IN
), in conjunction with the ampli-
fier input resistance (R
IN
), forms a highpass filter that
removes the DC bias from an incoming signal (see the
Block Diagrams
). The AC-coupling capacitor allows the
amplifier to bias the signal to an optimum DC level.
Assuming zero source impedance, the -3dB point of
the highpass filter is given by:
R
IN
is the amplifier’s internal input resistance value
given in the
Electrical Characteristics
table. Choose C
IN
such that f
-3dB
is well below the lowest frequency of
interest. Setting f
-3dB
too high affects the amplifier’s
low-frequency response. Use capacitors with low-volt-
age coefficient dielectrics, such as tantalum or alu-
minum electrolytic. Capacitors with high-voltage
coefficients, such as ceramics, may result in increased
distortion at low frequencies.
BIAS Capacitor
BIAS is the output of the internally generated DC bias
voltage. The BIAS bypass capacitor, C
BIAS
, improves
PSRR and THD+N by reducing power supply and other
noise sources at the common-mode bias node, and
also generates the clickless/popless, startup/shutdown
DC bias waveforms for the speaker amplifiers. Bypass
BIAS with a 1µF capacitor to GND.
Charge-Pump Capacitor Selection
Use capacitors with an ESR less than 100mΩ for opti-
mum performance. Low-ESR ceramic capacitors mini-
mize the output resistance of the charge pump. For
best performance over the extended temperature
range, select capacitors with an X7R dielectric. Table 4
lists suggested manufacturers.
Flying Capacitor (C1)
The value of the flying capacitor (C1) affects the load
regulation and output resistance of the charge pump. A
C1 value that is too small degrades the device’s ability
to provide sufficient current drive, which leads to a loss
of output voltage. Increasing the value of C1 improves
load regulation and reduces the charge-pump output
resistance to an extent. See the Output Power vs.
Charge-Pump Capacitance and Load Resistance
graph in the
Typical Operating Characteristics
. Above
2.2µF, the on-resistance of the switches and the ESR of
C1 and C2 dominate.
Output Capacitor (C2)
The output capacitor value and ESR directly affect the
ripple at CPV
SS
. Increasing the value of C2 reduces
output ripple. Likewise, decreasing the ESR of C2
f
RC
dB
IN IN
=
3
1
2π
SUPPLIER PHONE FAX WEBSITE
Taiyo Yuden 800-348-2496 847-925-0899 www.t-yuden.com
TDK 807-803-6100 847-390-4405 www.component.tdk.com
Table 4. Suggested Capacitor Manufacturers

MAX9750CETI+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Audio Amplifiers Integrated Circuits (ICs)
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union