5©2015 Integrated Device Technology, Inc December 16, 2015
83052I-01 Datasheet
AC Electrical Characteristics
Table 5A. AC Characteristics, V
DD
= V
DDO
= 3.3V ± 5%, T
A
=-40°C to 85°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the
device is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after
thermal equilibrium has been reached under these conditions
NOTE 1: Measured from the V
DD
/2 of the input to V
DDO
/2 of the output.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at V
DDO
/2.
NOTE 4: Defined as skew between outputs on different devices operating at the same supply voltage and with equal load conditions.
Using the same input on each device, the output is measured at V
DDO
/2.
NOTE 5: Driving only one input clock.
Table 5B. AC Characteristics, V
DD
= 3.3V ± 5%, V
DDO
= 2.5V ± 5%, T
A
=-40°C to 85°C
NOTE: See Notes above.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
MAX
Output Frequency 250 MHz
tp
LH
Propagation Delay, Low to High;
NOTE 1
2.0 2.45 3.0 ns
tp
HL
Propagation Delay, High to Low;
NOTE 1
2.0 2.45 3.0 ns
tsk(i) Input Skew; NOTE 2 20 85 ps
tsk(o) Output Skew; NOTE 2, 3 15 65 ps
tsk(pp) Part-to-Part Skew; NOTE 2, 4 500 ps
tjit
Buffer Additive Phase Jitter, RMS;
refer to Additive Phase Jitter
section, NOTE 5
Integration Range: 12kHz - 20MHz 0.15 ps
t
R
/ t
F
Output Rise/Fall Time 20% to 80% 200 600 ps
odc Output Duty Cycle 40 60 %
MUX
ISOL
MUX Isolation Unselected CLK input @100MHz 45 dB
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
MAX
Output Frequency 250 MHz
tp
LH
Propagation Delay, Low to High;
NOTE 1
2.2 2.55 3.0 ns
tp
HL
Propagation Delay, High to Low;
NOTE 1
2.2 2.55 3.0 ns
tsk(i) Input Skew; NOTE 2 10 50 ps
tsk(o) Output Skew; NOTE 2, 3 20 70 ps
tsk(pp) Part-to-Part Skew; NOTE 2, 4 500 ps
tjit
Buffer Additive Phase Jitter, RMS;
refer to Additive Phase Jitter
section, NOTE 5
Integration Range: 12kHz - 20MHz 0.12 ps
t
R
/ t
F
Output Rise/Fall Time 20% to 80% 200 600 ps
odc Output Duty Cycle 40 60 %
MUX
ISOL
MUX Isolation Unselected CLK input @100MHz 45 dB
