MAX1927/MAX1928
Low-Output-Voltage, 800mA, PWM Step-Down
DC-DC Converters
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Pin Description
PIN
NAME
FUNCTION
1
PWM
Forced-PWM Input. Drive to GND to use PWM at medium to heavy loads and pulse-skipping at light loads.
Drive to BATT to force PWM operation at all loads.
2 GND Ground
3 REF Internal 1.25V Reference. Bypass to GND with a 0.1µF capacitor.
4FB
Output Feedback Sense Input. To set the output voltage to the preset voltage (MAX1928), connect FB directly
to the output. To adjust the output voltage (MAX1927R), connect FB to the center of an external resistor-
divider between the output and GND. FB regulation voltage is 0.75V.
5
COMP
Compensation Input. See the Compensation, Stability, and Output Capacitor section for compensation
component selection.
6
SHDN
Shutdown Control Input. Drive low to shut down the converter. Drive high for normal operation.
7
PGND
Power Ground
8 LX Inductor Connection to the drains of the internal power MOSFETs.
9
BATT
Supply Voltage Input. Connect to a 2.6V to 5.5V source. Bypass to GND with a low-ESR 10µF capacitor.
10 POK
Power-OK Open-Drain Output. Once the soft-start routine has completed, POK goes high impedance 20ms
after FB exceeds 90% of its expected final value.
N
N
P
P
SLOPE
COMPENSATION
POWER-OK
CONTROL
1MHz
OSC
BIAS
COMP
BATT
PWM
CONTROL
1.25V
REFERENCE
PFM CURRENT
COMPARATOR
PWM
COMPARATOR
PWM
ILIM
COMPARATOR
TO
COMP
N-CHANNEL
CURRENT COMPARATOR
PGND
POK
FB
REF
MAX1927R
ONLY
GND
MAX1928
ONLY
LX
SHDN
MAX1927
MAX1928
Figure 1. Simplified Functional Diagram
MAX1927/MAX1928
Detailed Description
The MAX1927/MAX1928 PWM step-down DC-DC con-
verters accept inputs as low as 2.6V, while delivering
800mA to output voltages as low as 0.75V. These
devices operate in one of two modes to optimize noise
and quiescent current. Under heavy loads, MAX1927/
MAX1928 operate in pulse-width modulation (PWM)
mode and switch at a fixed 1MHz frequency. Under
light loads, they operate in PFM mode to reduce power
consumption. In addition, both devices provide selec-
table forced PWM operation for minimum noise at all
load currents.
PFM Operation and PWM Control Scheme
The PFM mode improves efficiency and reduces quies-
cent current to 140µA at light loads. The MAX1927/
MAX1928 initiate pulse-skipping PFM operation when
the peak inductor current drops below 130mA. During
PFM operation, the MAX1927/MAX1928 switch only as
necessary to service the load, reducing the switching
frequency and associated losses in the internal switch,
synchronous rectifier, and inductor.
During PFM mode, a switching cycle initiates when the
error amplifier senses that the output voltage has
dropped below the regulation point. If the output volt-
age is low, the P-channel MOSFET switch turns on and
conducts current to the output filter capacitor and load.
The PMOS switch turns off when the PWM comparator
is satisfied. The MAX1927/MAX1928 then wait until the
error amplifier senses a low output voltage to start
again. Some jitter is normal during the transition from
PFM to PWM with loads around 100mA. This has no
adverse impact on regulation.
At loads greater than 130mA, the MAX1927/MAX1928
use a fixed-frequency, current-mode, PWM controller
capable of achieving 100% duty cycle. Current-mode
feedback provides cycle-by-cycle current limiting,
superior load and line response, as well as overcurrent
protection for the internal MOSFET and synchronous
rectifier. A comparator at the P-channel MOSFET switch
detects overcurrent conditions exceeding 1.1A.
During PWM operation, the MAX1927/MAX1928 regu-
late output voltage by switching at a constant frequency
and then modulating the power transferred to the load
using the PWM comparator (Figure 1). The error-amp
output, the main switch current-sense signal, and the
slope compensation ramp are all summed at the PWM
comparator. The comparator modulates the output
power by adjusting the peak inductor current during the
first half of each cycle based on the output-error volt-
age. The MAX1927/MAX1928 have relatively low AC-
loop gain coupled with a high-gain integrator to enable
the use of a small, low-valued, output filter capacitor.
The resulting load regulation is 0.3% (typ) from 0 to
800mA.
Forced PWM Operation
To force PWM-only operation, connect PWM to BATT.
Forced PWM operation is desirable in sensitive RF and
data-acquisition applications to ensure that switching
noise does not interfere with sensitive IF and data sam-
pling frequencies. A minimum load is not required dur-
ing forced PWM operation because the synchronous
rectifier passes reverse inductor current as needed to
allow constant frequency operation with no load.
Forced PWM operation has higher quiescent current
than PFM (2mA typ compared to 140µA) due to contin-
uous switching.
100% Duty-Cycle Operation
The maximum on-time can exceed one internal oscilla-
tor cycle, which permits operation at 100% duty cycle.
As the input voltage drops, the duty cycle increases
until the internal P-channel MOSFET stays on continu-
ously. Dropout voltage at 100% duty cycle is the output
current multiplied by the sum of the internal PMOS on-
resistance (typically 0.25) and the inductor resis-
tance. Near dropout, switching cycles can be skipped,
reducing switching frequency. However, voltage ripple
remains small because the current ripple is still low.
Synchronous Rectification
An N-channel synchronous rectifier eliminates the need
for an external Schottky diode and improves efficiency.
The synchronous rectifier turns on during the second
half of each cycle (off-time). During this time, the volt-
age across the inductor is reversed, and the inductor
current falls. In normal mode, the synchronous rectifier
is turned off when either the output falls out of regula-
tion (and another on-time begins) or when the inductor
current approaches zero. In forced PWM mode, the
synchronous rectifier remains active until the beginning
of a new cycle.
Shutdown Mode
Driving SHDN to GND places the MAX1927/MAX1928
in shutdown mode. In shutdown, the reference, control
circuitry, internal switching MOSFET, and synchronous
rectifier turn off and the output becomes high imped-
ance. Drive SHDN high for normal operation. Input cur-
rent falls to 0.1µA (typ) during shutdown mode.
POK Output
POK is an open-drain output that goes high impedance
20ms after the soft-start ramp has concluded and V
FB
is within 90% of the threshold. POK is low impedance
when in shutdown.
Low-Output-Voltage, 800mA, PWM Step-Down
DC-DC Converters
8 _______________________________________________________________________________________
Applications Information
Output Voltage Selection
The MAX1927/MAX1928 have preset output voltages.
In addition, the MAX1927R has an adjustable output.
To set the output voltage at the preset voltage, connect
FB to the output. See Table 1 for a list of the preset volt-
ages and their corresponding part numbers.
The output voltage for the MAX1927R is adjustable
from 0.75V to the input voltage by connecting FB to a
resistor-divider between the output and GND (Figure
2). To determine the values of the resistor-divider, first
select a value for feedback resistor R2 between 5k to
50k. R1 is then given by:
where V
FB
is 0.75V.
Input Capacitor Selection
Capacitor equivalent series resistance (ESR) is a major
contributor to input ripple in high-frequency DC-DC
converters. Ordinary aluminum-electrolytic capacitors
have high ESR and should be avoided. Low-ESR alu-
minum electrolytic capacitors are acceptable and rela-
tively inexpensive. Low-ESR tantalum capacitors or
polymer capacitors are better and provide a compact
solution for space-constrained surface-mount designs.
Ceramic capacitors have the lowest ESR overall.
The input filter capacitor reduces peak currents and
noise at the input voltage source. Connect a low-ESR
bulk capacitor (10µF typ) to the input. Select this bulk
capacitor to meet the input ripple requirements and
voltage rating rather than capacitance value. Use the
following equation to calculate the maximum RMS input
current:
Compensation, Stability, and
Output Capacitor
The MAX1927/MAX1928 are externally compensated
with a resistor and a capacitor (see Figure 3, R
C
and
C
C
) in series from COMP to GND. An additional capaci-
tor (C
f
) may be required from COMP to GND if high-
ESR output capacitors are used. The capacitor inte-
grates the current from the transimpedance amplifier,
averaging output capacitor ripple. This sets the device
speed for transient response and allows the use of
small ceramic output capacitors because the phase-
shifted capacitor ripple does not disturb the current
regulation loop. The resistor sets the proportional gain
of the output error voltage by a factor g
m
R
C
.
Increasing this resistor also increases the sensitivity of
the control loop to output ripple.
The resistor and capacitor set a compensation zero
that defines the systems transient response. The load
creates a dynamic pole, shifting in frequency with
changes in load. As the load decreases, the pole fre-
quency decreases. System stability requires that the
compensation zero must be placed to ensure adequate
phase margin (at least 30° at unity gain). The following
is a design procedure for the compensation network:
1) Select an appropriate converter bandwidth (f
C
) to
stabilize the system while maximizing transient
response. This bandwidth should not exceed 1/10
of the switching frequency.
2) Calculate the compensation capacitor, C
C
, based
on this bandwidth:
For the MAX1927:
C
V
IR
g
R
RR f
C
OUT
OUT MAX CS
m
C
=
×
××
+
×
()
12
12
1
2π
I
I
V
VVV
RMS
OUT
IN
OUT IN OUT
×
()
RR
V
V
OUT
FB
12 1
MAX1927/MAX1928
Low-Output-Voltage, 800mA, PWM Step-Down
DC-DC Converters
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LX
FB
R1
R2
50k
MAX1927R
Figure 2. Setting the Adjustable Output Voltage
PART
PRESET OUTPUT VOLTAGE
MAX1927R 0.75V, Adjustable
MAX1928-15 1.5 V
MAX1928-18 1.8 V
MAX1928-25 2.5 V
Table 1. FB Regulation Voltages

3-644861-1

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TE Connectivity
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Headers & Wire Housings 11P MTA100 SHRD HDR,W/O PEG SN
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