SI32260QC21BC0-EVB

ProSLIC Copyright © 2011 by Silicon Laboratories 7.8.11
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TIPa
N/C
GPIO2A / SRINGCa
GPIO1a / STIPCa
SRINGDCa
SRINGACa
STIPACa
STIPDCa
CAPPa
CAPMa
SVBATa
SVDC
RSTB
INTB / DTXENB
FSYNC
SDITHRU
PSCLK / PCLK
DATAo / DTX
DATAi / DRX
SDCHa
SDCLa
DCDRVa
AUXoi / DCFFa
AUXdrv / DCFFb
DCDRVb
SDCLb
SDCHb
VDDD
VDDREG
CSB
SCLK
SDO
SDI
SVBATb
CAPMb
CAPPb
IREF
STIPDCb
STIPACb
SRINGACb
SRINGDCb
GPIO1b / STIPCb
GPIO2b / SRINGCb
VDDA
N/C
TIPb
N/C
RINGb
VBATb
N/C
BASEb
N/C
N/C
N/C
N/C
N/C
BAT_PO
BASEa
VBATa
RINGa
EPAD 1
EPAD 2
SPI
Control
Interface
PCM/
GCI
Interface
DSP
DTMF &
Tone Gen
Programmable
AC Impedance
and Hybrid
Caller ID
Ringing
Generator
ADC
DAC
CODEC
SLIC
Linefeed
Control
Linefeed
Monitor
DC-DC Controller
Line Diagnostics
PLL
PCLK
FSYNC
DRX
DTX
CS
SDI
SDO
SCLK
INT
RST
SPI
Control
Interface
PCM/
GCI
Interface
DSP
DTMF &
Tone Gen
Programmable
AC Impedance
and Hybrid
Caller ID
Ringing
Generator
ADC
DAC
CODEC
DC-DC Controllers
Line Diagnostics
PLL
PCLK
FSYNC
DRX
DTX
CS
SDI
SDO
SCLK
INT
RST
Si32260/1
DAC
Linefeed
CODEC
SLIC
DAC
Linefeed
CODEC
SLIC
ADC
ADC
Linefeed
Control
Linefeed
Monitor
Linefeed
Control
Linefeed
Monitor
RING
TIP
RING
TIP
Si32260/61
Single-Chip Dual ProSLIC®
Description
The Si32260/1 Dual ProSLIC® devices, in a single package,
implement two complete foreign exchange station (FXS) telephony
interfaces. The Si32260/1 devices operate from a 3.3
V supply
and have standard PCM/SPI or GCI bus digital interfaces. A pair of
built-in dc-dc converter controllers can be used to automatically
generate the optimal battery voltage required for each line-state,
optimizing efficiency and minimizing heat generation. The
Si32260/1 devices are designed to operate not only with a tracking
battery supply for each channel for lowest power consumption, but
also with shared battery supplies, for lowest cost. When used with
shared battery supplies, the internal dc-dc controller operates in
Tracking Shared Supply (TSS) mode to deliver power
consumption lower than typical fixed voltage shared rail designs.
Self-testing and metallic loop testing (MLT) (e.g., GR-909) is
facilitated by the built-in DSP, monitor ADC, and test load. The
devices are available with linefeed voltage ratings of –110
V
(Si32260) or –140
V (Si32261) to support high voltage ringing, and
both devices support wideband audio for better-than-PSTN voice
quality. The Si32260/1 devices are available in a 8
x 8 mm 60-pin
QFN package.
Applications
VoIP gateways and routers
xDSL IADs
Optical Network Terminals/Units (ONT/U)
Analog Terminal Adapters (ATA)
Cable eMTA
Wireless Fixed Terminals (WFT)
Wireless Local Loop (WLL)
WiMAX CPE
Private Branch Exchange (PBX)
VoIP MDU gateways
Si32260/61 Features
Two complete FXS channels in 8 x 8 mm
Performs all BORSCHT functions
Ideal for short- or long-loop applications
Ultra low power consumption
Internal balanced or unbalanced ringing
Patented low power ringing
Adaptive ringing
Simplified configuration and diagnostics
Supported by ProSLIC API
GR-909 loop diagnostics
Audio diagnostics with loopback
Integrated test load
Wideband voice support
On-hook transmission
Loop or ground start operation
Smooth polarity reversal
Pulse metering
PCM and SPI bus digital interfaces with programmable
interrupts
Software-programmable parameters:
Ringing frequency, amplitude, cadence, and waveshape
Two-wire ac impedance
Transhybrid balance
DC current loop feed (10–45 mA)
Loop closure and ring trip thresholds
Ground key detect threshold
Integrated dc-dc controllers with direct connection to MOSFET
Three high voltage supply options
Full tracking
Tracking shared supplies
Fixed rail
DTMF generator/decoder
A-Law/µ-Law companding, linear PCM
GCI/IOM-2 mode support
3.3 V operation
Pb-free/RoHS-compliant packaging
ProSLIC Copyright © 2011 by Silicon Laboratories 7.8.11
Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc.
Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders
Si32260/61
Single-Chip Dual ProSLIC®
Selected Electrical Specifications
Ordering Guide
Parameter Symbol Test Condition Min Typical Max Unit
Ambient Temperature T
A
F-Grade 0 25 70 °C
G-Grade –40 25 85 °C
Supply Voltage V
DD
3.13 3.3 3.47 V
Battery Voltage V
BAT
–15 –110/–140 V
Maximum Loop Resistance
(loop + load)
R
LOOP
I
LOOP
=18 mA, V
BAT
= –52 V 2000
DC Differential Output
Resistance
R
DO
I
LOOP
< I
LIM
160 640
Idle Channel Noise C-Message weighted 8 12 dBrnC
PSRR from V
DD
RX and TX, dc to 3.4 kHz 55 dB
Longitudinal to Metallic/PCM
Balance (forward or reverse)
200 Hz to 1 kHz 58 60 dB
1 kHz to 3.4 kHz 53 58 dB
Metallic/PCM to Longitudinal Balance 200 Hz to 3.4 kHz 40 dB
Longitudinal Impedance
200 Hz to 3.4 kHz at
TIP or RING
50
Longitudinal Current per Pin
Active off-hook
200 Hz to 3.4 kHz
25 mA
DC Feed Current 45 mA
2-Wire Return Loss 200 Hz to 3.4 kHz 26 30 dB
Transhybrid Balance 300 Hz to 3.4 kHz 26 30 dB
Thermal Resistance (QFN-60) θ
JA
42 °C/W
FXS Pin Description Max Vbat Temperature
Si32260-C-FM Dual FXS, wideband capable –110 V 0 to 70 °C
Si32260-C-GM Dual FXS, wideband capable –110 V –40 to 85 °C
Si32261-C-FM Dual FXS, wideband capable –140 V 0 to 70 °C
Si32261-C-GM Dual FXS, wideband capable –140 V –40 to 85 °C
*Note: Adding the suffix "R" to the part number (e.g., Si32261-C-FMR) denotes tape and ree
Package Information 60-pin QFN
c
D
D2
D3
e
b
8.00 BSC
7.50 BSC
Min Typ Max
MM
0.20 0.25 0.30
A 0.60 0.65 0.70
E
E2 6.35 6.40 6.45
E3
E4 2.46 2.51 2.56
0.25 0.30 0.35
6.35 6.40 6.45
0.50 BSC
8.00 BSC
7.50 BSC
E5 3.34 3.39 3.44
L 0.35 0.40 0.45
L1 0.05 0.10 0.15
aaa 0.15
bbb 0.15
ccc 0.10
ddd 0.10

SI32260QC21BC0-EVB

Mfr. #:
Manufacturer:
Silicon Labs
Description:
Daughter Cards & OEM Boards Si32260 dual FXS plus FXO daughter card (low cost quasi-Cuk dc-dc converter) for use ONLY with Broadcom development kits
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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