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HEF40244BT,652

P1-P3P4-P6P7-P9P10-P12P13-P14
Nexperia
HEF40244B
Octal buffers with 3-state outputs
10.1 Waveforms and test circuit
V
DD
- V
OH
(V)
-2 -1 0
aaa-027602
0
I
OH
(mA)
-100
-25
-50
(2)
-75
V
DD
= 5 V
10 V
15 V
(1)
(1) P-channel MOS transistor conducting.
(2) P-channel MOS transistor and bipolar n-p-n transistor
conducting.
Figure 5. Typical output source current characteristic.
aaa-027603
V
DD
O
P
N
V
SS
Figure 6. Schematic diagram of output stage.
aaa-028683
output
input
t
PHL
t
THL
t
TLH
t
PLH
V
M
V
M
V
DD
V
SS
V
OH
90 % 90 %
10 %10 %
V
OL
V
M
V
M
Measurement points are given in Table 9.
Logic levels: V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Figure 7. Input (IAn; IBn) to output (OAn; OBn) propagation delays and output transition time.
HEF40244B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved.
Product data sheet Rev. 4 — 29 June 2018
7 / 14
Nexperia
HEF40244B
Octal buffers with 3-state outputs
C
L
(pF)
10 10
4
10
3
10
2
aaa-027604
10
3
10
2
10
4
t
THL
t
TLH
(ns)
10
V
DD
= 5 V
10 V
15 V
V
DD
= 5 V
10 V
15 V
t
THL
t
TLH
Figure 8. Output transition times as a function of the load capacitance
Measurement points are given in Table 9.
Logic levels: V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Figure 9. 3-state enable and disable times
Table 9. Measurement points
Supply voltage Input Output
V
DD
V
M
V
M
V
X
V
Y
5 V to 15 V 0.5V
DD
0.5V
DD
0.1V
DD
0.9V
DD
HEF40244B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved.
Product data sheet Rev. 4 — 29 June 2018
8 / 14
Nexperia
HEF40244B
Octal buffers with 3-state outputs
V
M
V
M
t
W
t
W
10 %
90 %
10 %
90 %
0 V
V
I
V
I
negative
pulse
positive
pulse
0 V
V
M
V
M
90 %
10 %
90 %
10 %
t
f
t
r
t
r
t
f
001aaj781
a. Input waveform
001aaj915
V
EXT
V
DD
V
I
V
O
DUT
C
L
R
T
R
L
G
b. Test circuit
Test and measurement data is given in Table 10.
Definitions test circuit:
R
L
= Load resistance.
R
T
= Termination resistance should be equal to output impedance Z
o
of the pulse generator.
C
L
= Load capacitance including jig and probe capacitance.
Figure 10. Test circuit for measuring switching times
Table 10. Test data
Supply voltage Input Load V
EXT
V
DD
V
I
t
r
, t
f
C
L
R
L
t
PLH
, t
PHL
t
PHZ
, t
PZH
t
PLZ
, t
PZL
5 V to 15 V V
DD
≤ 20 ns 50 pF 1 kΩ open V
SS
V
DD
HEF40244B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved.
Product data sheet Rev. 4 — 29 June 2018
9 / 14
P1-P3P4-P6P7-P9P10-P12P13-P14

HEF40244BT,652

Mfr. #:
Buy HEF40244BT,652
Manufacturer:
Nexperia
Description:
Buffers & Line Drivers OCTAL BUFF/DRVR 3ST
Lifecycle:
New from this manufacturer.
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