DM74LS373WM

© 2001 Fairchild Semiconductor Corporation DS006431 www.fairchildsemi.com
April 1986
Revised November 2001
DM74LS373 • DM74LS374 3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops
DM74LS373 DM74LS374
3-STATE Octal D-Type Transparent Latches
and Edge-Triggered Flip-Flops
General Description
These 8-bit registers feature totem-pole 3-STATE outputs
designed specifically for driving highly-capacitive or rela-
tively low-impedance loads. The high-impedance state and
increased high-logic level drive provide these registers with
the capability of being connected directly to and driving the
bus lines in a bus-organized system without need for inter-
face or pull-up components. They are particularly attractive
for implementing buffer registers, I/O ports, bidirectional
bus drivers, and working registers.
The eight latches of the DM74LS373 are transparent D-
type latches meaning that while the enable (G) is HIGH the
Q outputs will follow the data (D) inputs. When the enable
is taken LOW the output will be latched at the level of the
data that was set up.
The eight flip-flops of the DM74LS374 are edge-triggered
D-type flip flops. On the positive transition of the clock, the
Q outputs will be set to the logic states that were set up at
the D inputs.
A buffered output control input can be used to place the
eight outputs in either a normal logic state (HIGH or LOW
logic levels) or a high-impedance state. In the high-imped-
ance state the outputs neither load nor drive the bus lines
significantly.
The output control does not affect the internal operation of
the latches or flip-flops. That is, the old data can be
retained or new data can be entered even while the outputs
are OFF.
Features
Choice of 8 latches or 8 D-type flip-flops in a single
package
3-STATE bus-driving outputs
Full parallel-access for loading
Buffered control inputs
P-N-P inputs reduce D-C loading on data lines
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Order Number Package Number Package Description
DM74LS373WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
DM74LS373SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74LS373N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
DM74LS374WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
DM74LS374SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74LS374N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
www.fairchildsemi.com 2
DM74LS373 DM74LS374
Connection Diagrams
DM74LS373 DM74LS374
Function Tables
DM74LS373 DM74LS374
H = HIGH Level (Steady State) L = LOW Level (Steady State)
X = Don’t Care Z = High Impedance State
= Transition from LOW-to-HIGH level Q
0
= The level of the output
before steady-state input conditions were established.
Logic Diagrams
DM74LS373
Transparent Latches
DM74LS374
Positive-Edge-Triggered Flip-Flops
Output Enable
D Output
Control G
LHHH
LHLL
LLXQ
0
HXXZ
Output
Clock D Output
Control
L HH
L
LL
LLXQ
0
HXXZ
3 www.fairchildsemi.com
DM74LS373 DM74LS374
Absolute Maximum Ratings(Note 1)
Note 1: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The Recommended Operating Conditions table will define the conditions
for actual device operation.
DM74LS373 Recommended Operating Conditions
Note 2: The symbol () indicates the falling edge of the clock pulse is used for reference.
Note 3: T
A
= 25°C and V
CC
= 5V.
DM74LS373 Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Note 4: All typicals are at V
CC
= 5V, T
A
= 25°C.
Note 5: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Supply Voltage 7V
Input Voltage 7V
Storage Temperature Range
65°C to +150°C
Operating Free Air Temperature Range 0
°C to +70°C
Symbol Parameter Min Nom Max Units
V
CC
Supply Voltage 4.75 5 5.25 V
V
IH
HIGH Level Input Voltage 2 V
V
IL
LOW Level Input Voltage 0.8 V
I
OH
HIGH Level Output Current 2.6 mA
I
OL
LOW Level Output Current 24 mA
t
W
Pulse Width Enable HIGH 15
ns
(Note 3) Enable LOW 15
t
SU
Data Setup Time (Note 2) (Note 3) 5 ns
t
H
Data Hold Time (Note 2) (Note 3) 20 ns
T
A
Free Air Operating Temperature 0 70 °C
Symbol Parameter Conditions Min
Typ
Max Units
(Note 4)
V
I
Input Clamp Voltage V
CC
= Min, I
I
= 18 mA 1.5 V
V
OH
HIGH Level V
CC
= Min, I
OH
= Max
2.4 3.1 V
Output Voltage V
IL
= Max, V
IH
= Min
V
OL
LOW Level V
CC
= Min, I
OL
= Max
Output Voltage V
IL
= Max, V
IH
= Min 0.35 0.5 V
I
OL
= 12 mA, V
CC
= Min 0.4
I
I
Input Current @ Max Input Voltage V
CC
= Max, V
I
= 7V 0.1 mA
I
IH
HIGH Level Input Current V
CC
= Max, V
I
= 2.7V 20 µA
I
IL
LOW Level Input Current V
CC
= Max, V
I
= 0.4V 0.4 mA
I
OZH
Off-State Output Current with V
CC
= Max, V
O
= 2.7V
20 µA
HIGH Level Output Voltage Applied V
IH
= Min, V
IL
= Max
I
OZL
Off-State Output Current with V
CC
= Max, V
O
= 0.4V
20 µA
LOW Level Output Voltage Applied V
IH
= Min, V
IL
= Max
I
OS
Short Circuit Output Current V
CC
= Max (Note 5) 50 225 mA
I
CC
Supply Current V
CC
= Max, OC = 4.5V,
24 40 mA
D
n
, Enable = GND

DM74LS373WM

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
IC LATCH OCTAL D 3ST 20-SOIC
Lifecycle:
New from this manufacturer.
Delivery:
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