NLV74VHC1G09DTT1G

© Semiconductor Components Industries, LLC, 2013
October, 2013 Rev. 18
1 Publication Order Number:
MC74VHC1G09/D
MC74VHC1G09
2-Input AND Gate with
Open Drain Output
The MC74VHC1G09 is an advanced high speed CMOS 2input AND
gate with open drain output fabricated with silicon gate CMOS
technology. It achieves high speed operation similar to equivalent Bipolar
Schottky TTL while maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including an open
drain output which provides the capability to set output switching level.
This allows the MC74VHC1G09 to be used to interface 5 V circuits to
circuits of any voltage between V
CC
and 7 V using an external resistor
and power supply.
The MC74VHC1G09 input structure provides protection when
voltages up to 7 V are applied, regardless of the supply voltage.
Features
High Speed: t
PD
= 4.3 ns (Typ) at V
CC
= 5 V
Low Internal Power Dissipation: I
CC
= 1 mA (Max) at T
A
= 25°C
Power Down Protection Provided on Inputs
Pin and Function Compatible with Other Standard Logic Families
Chip Complexity: FETs = 62; Equivalent Gates = 16
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AECQ100
Qualified and PPAP Capable
These Devices are PbFree and are RoHS Compliant
V
CC
IN B
IN A
OUT Y
GND
IN A
IN B
OUT Y
&
OVT
Figure 1. Pinout (Top View)
Figure 2. Logic Symbol
1
2
3
4
5
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MARKING
DIAGRAMS
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
VX = Device Code
M = Date Code*
G = PbFree Package
SC88A / SOT353 / SC70
DF SUFFIX
CASE 419A
TSOP5 / SOT23 / SC59
DT SUFFIX
CASE 483
VX M G
G
L
L
H
H
L
H
L
H
FUNCTION TABLE
Inputs Output
AB
L
L
L
Z
Y
PIN ASSIGNMENT
1
2
3 GND
IN B
IN A
4
5V
CC
OUT Y
1
5
VX M G
G
M
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
MC74VHC1G09
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2
MAXIMUM RATINGS
Symbol Characteristics Value Unit
V
CC
DC Supply Voltage 0.5 to +7.0 V
V
IN
DC Input Voltage 0.5 to +7.0 V
V
OUT
DC Output Voltage 0.5 to 7.0 V
I
IK
Input Diode Current 20 mA
I
OK
Output Diode Current +20 mA
I
OUT
DC Output Current, per Pin +25 mA
I
CC
DC Supply Current, V
CC
and GND +50 mA
P
D
Power dissipation in still air SC88A, TSOP5 200 mW
q
JA
Thermal resistance SC88A, TSOP5 333 °C/W
T
L
Lead temperature, 1 mm from case for 10 s 260 °C
T
J
Junction temperature under bias +150 °C
T
stg
Storage temperature 65 to +150 °C
MSL Moisture Sensitivity Level 1
F
R
Flammability Rating Oxygen Index: 28 to 34 UL 94 V0 @ 0.125 in
V
ESD
ESD Withstand Voltage Human Body Model (Note 1)
Machine Model (Note 2)
Charged Device Model (Note 3)
> 2000
> 200
N/A
V
I
Latchup
Latchup Performance Above V
CC
and Below GND at 125°C (Note 4) ±500 mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Tested to EIA/JESD22A114A
2. Tested to EIA/JESD22A115A
3. Tested to JESD22C101A
4. Tested to EIA/JESD78
RECOMMENDED OPERATING CONDITIONS
Symbol Characteristics Min Max Unit
V
CC
DC Supply Voltage 2.0 5.5 V
V
IN
DC Input Voltage 0.0 5.5 V
V
OUT
DC Output Voltage 0.0 7.0 V
T
A
Operating Temperature Range 55 +125 °C
t
r
, t
f
Input Rise and Fall Time V
CC
= 3.3 V ± 0.3 V
V
CC
= 5.0 V ± 0.5 V
0
0
100
20
ns/V
Device Junction Temperature versus
Time to 0.1% Bond Failures
Junction
Temperature °C
Time, Hours Time, Years
80 1,032,200 117.8
90 419,300 47.9
100 178,700 20.4
110 79,600 9.4
120 37,000 4.2
130 17,800 2.0
140 8,900 1.0
1
1 10 100
1000
TIME, YEARS
NORMALIZED FAILURE RATE
T
J
= 80
C°
T
J
= 90
C°
T
J
= 100 C°
T
J
= 110 C°
T
J
= 130 C°
T
J
= 120 C°
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
Figure 3. Failure Rate vs. Time
Junction Temperature
MC74VHC1G09
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3
DC ELECTRICAL CHARACTERISTICS
Symbol Parameter Test Conditions
V
CC
(V)
T
A
= 25°C T
A
85°C 55 T
A
125°C
Unit
Min Typ Max Min Max Min Max
V
IH
Minimum HighLevel
Input Voltage
2.0
3.0
4.5
5.5
1.5
2.1
3.15
3.85
1.5
2.1
3.15
3.85
1.5
2.1
3.15
3.85
V
V
IL
Maximum LowLevel
Input Voltage
2.0
3.0
4.5
5.5
0.5
0.9
1.35
1.65
0.5
0.9
1.35
1.65
0.5
0.9
1.35
1.65
V
V
OL
Maximum LowLevel
Output Voltage
V
IN
= V
IH
or V
IL
V
IN
= V
IH
or V
IL
I
OL
= 50 mA
2.0
3.0
4.5
0.0
0.0
0.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
V
IN
= V
IH
or V
IL
I
OL
= 4 mA
I
OL
= 8 mA
3.0
4.5
0.36
0.36
0.44
0.44
0.52
0.52
V
I
IN
Maximum Input
Leakage Current
V
IN
= 5.5 V or GND 0 to
5.5
±0.1 ±1.0 ±1.0
mA
I
CC
Maximum Quiescent
Supply Current
V
IN
= V
CC
or GND 5.5 1.0 20 40
mA
I
OFF
Power OffOutput
Leakage Current
V
OUT
= 5.5 V
V
IN
= 5.5 V
0 0.25 2.5 5
mA
AC ELECTRICAL CHARACTERISTICS C
load
= 50 pF, Input t
r
= t
f
= 3.0 ns
Symbol Parameter Test Conditions
T
A
= 25°C T
A
85°C 55 T
A
125°C
Unit
Min Typ Max Min Max Min Max
t
PZL
Maximum Output
Enable Time,
Input A or B to Y
V
CC
= 3.3 ± 0.3 V C
L
= 15 pF
R
L
= R
I
= 500 W C
L
= 50 pF
6.2
8.7
8.8
12.3
10.5
14.0
12.5
16.5
ns
V
CC
= 5.0 ± 0.5 V C
L
= 15 pF
R
L
= R
I
= 500 W C
L
= 50 pF
4.3
5.8
5.9
7.9
7.0
9.0
9.0
11.0
t
PLZ
Maximum Output
Disable Time
V
CC
= 3.3 ± 0.3 V C
L
= 50 pF
R
L
= R
I
= 500 W
8.7 12.3 14.0 16.5
ns
V
CC
= 5.0 ± 0.5 V C
L
= 50 pF
R
L
= R
I
= 500 W
5.8 7.9 9.0 11.0
C
IN
Maximum Input Ca-
pacitance
6.0 10 10 10 pF
C
PD
Power Dissipation Capacitance (Note 5)
Typical @ 25°C, V
CC
= 5.0 V
pF
18
5. C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
CC(OPR
)
= C
PD
V
CC
f
in
+ I
CC
. C
PD
is used to determine the noload dynamic
power consumption; P
D
= C
PD
V
CC
2
f
in
+ I
CC
V
CC
.

NLV74VHC1G09DTT1G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Logic Gates LOG CMOS GATE AND SN
Lifecycle:
New from this manufacturer.
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