1
PS8540E 10/19/05
OBSOLETE
03/22/06
Last Purchase Date: Aug 17, 2006
Last Shipment Date: Nov 17, 2006
PI90LVB179/PI90LVB180/
PI90LVB050/PI90LVB051
Features
• Signaling Rates >660 Mbps (330 MHz)
• Single 3.3V Power Supply Design
• Driver:
— ±350mV Differential Swing into a 50-ohm load
— Propogation Delay of 1.5ns Typ.
— Low Voltage TTL (LVTTL) Inputs are 5V Tolerant
— Driver is High Impedance when Disabled or V
CC
< 1.5V
• Receiver:
— Accepts ±50mV (min.) Differential Swing with up to 2.0V
ground potential difference
— Propagation Delay of 2ns Typ.
— Low Voltage TTL (LVTTL) Outputs
— Open, Short, and Terminated Fail Safe
• Industrial Temperature Operating Range: –40°C to 85°C
• Bus-Terminal ESD >12kV
• Packaging (Pb-free & Green avalible):
- PI90LVB179: 8-pin SOIC (W) & 8-pin MSOP (U)
- PI90LVB180: 14-pin TSSOP (L) & 14-pin SOIC (W)
- PI90LVB050: 16-pin TSSOP (L) & 16-pin SOIC (W)
- PI90LVB051: 16-pin TSSOP (L) & 16-pin SOIC (W)
3.3V Bus LVDS High-Speed Differential Line Drivers and Receivers
PI90LVB051
PI90LVB050
PI90LVB180
PI90LVB179
V
CC
D
IN1
D
OUT1+
D
OUT1–
D
EN
D
OUT2–
D
OUT2+
D
IN2
R
IN1–
R
IN1+
R
OUT1
R
EN*
R
OUT2
R
IN2+
R
IN2–
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
R
OUT
R
IN+
R
IN–
D
OUT–
D
OUT+
D
IN
GND
1
2
3
4
8
7
6
5
V
CC
D
IN1
D
OUT1+
D
OUT1–
D
EN2
D
OUT2–
D
OUT2+
D
IN2
R
IN1–
R
IN1+
R
OUT1
D
EN1
R
OUT2
R
IN2+
R
IN2–
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
V
CC
R
IN+
R
IN–
D
OUT–
D
OUT+
NC
NC
R
OUT
R
EN*
D
EN
D
IN
GND
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
D
IN1
D
EN1
D
IN2
D
EN2
R
OUT1
R
OUT2
D
OUT1+
D
OUT1-
D
OUT2+
D
OUT2-
R
IN1+
R
IN1-
R
IN2+
R
IN2-
D
IN1
D
IN2
D
EN
R
OUT2
R
OUT1
R
EN*
D
OUT1+
D
OUT1-
D
OUT2+
D
OUT2-
R
IN1+
R
IN1-
R
IN2+
R
IN2-
D
IN
D
EN
R
OUT
R
EN*
D
OUT+
D
OUT-
R
IN+
R
IN-
D
IN
R
OUT
D
OUT+
D
OUT-
R
IN+
R
IN-
8-Pin
U, W
16-Pin
L, W
14-Pin
L, W
16-Pin
L, W
Description
The PI90LVB179, PI90LVB180, PI90LVB050, and PI90LVB051 are
differential line drivers and receivers (transceivers) that are similar
to the IEEE 1596.3 SCI and ANSI/TIA/EIA-644 LVDS standards (the
difference is that the driver output current is doubled). This modi-
fication enables true half-duplex operation with more than one
LVDS driver or with two line transmission resistors over a 50-ohm
differential transmission line. These devices use low-voltage dif-
ferential signaling (LVDS) to achieve data rates in excess of 660 Mbps
while being less susceptible to noise than single-ended transmission.
The drivers translate a low-voltage TTL/CMOS input into a low-
voltage (350mV typical) differential output signal into a 50-ohm
load. The receivers translate a differential 350mV input signal to a
3V CMOS output level. Driver section can be independently set to a
power-down & high-impedance output mode with the D
EN
pin (active
HIGH). Receiver section is controlled by the R
EN*
pin (active LOW).
Applications
Applications include point-to-point and multidrop baseband data
transmission over a controlled impedance media of approximately
50-ohms. These include intra-system connections via printed cir-
cuit board traces or cables, hubs and routers for data communica-
tions; PBXs, switches, repeaters & base stations for telecommuni-
cations and other applications such as digital cameras, printers and
copiers.
