MP6529 – 5V TO 35V, THREE-PHASE BLDC MOTOR PRE-DRIVER
MP6529 Rev. 1.0 www.MonolithicPower.com 9
10/26/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
PIN FUNCTIONS
QFN-28
Pin #
TSSOP-28
Pin #
Name Description
1 26 VIN
Input supply voltage.
2 27 CPA
Charge pump capacitor connect terminal.
3 28 CPB
Charge pump capacitor connect terminal.
4 1 VREG
Gate driver supply output.
5 2 BSTA
Bootstrap output phase A.
6 3 SHA
High-side source connection phase A.
7 4 GHA
High-side gate drive phase A.
8 5 GLA
Low-side gate drive phase A.
9 6 BSTB
Bootstrap output phase B.
10 7 SHB
High-side source connection phase B.
11 8 GHB
High-side gate drive phase B.
12 9 GLB
Low-side gate drive phase B.
13 10 BSTC
Bootstrap output phase C.
14 11 SHC
High-side source connection phase C.
15 12 GHC
High-side gate drive phase C.
16 13 GLC
Low-side gate drive phase C.
17 14 LSS
Low-side source connection.
18 15 PWMC
PWM input for phase C.
19 16 PWMB
PWM input for phase B.
20 17 PWMA
PWM input for phase A.
21 18 ENC
Enable for phase C. Pull ENC below the specified threshold to disable
the gate driver output for phase C.
22 19 ENB
Enable for phase B. Pull ENB below the specified threshold to disable
the gate driver output for phase B.
23 20 ENA
Enable for phase A. Pull ENA below the specified threshold to disable
the gate driver output for phase A.
24 21 nFAULT
Fault indication. Open-drain output. nFAULT is in a fault condition at
logic low.
25 22 nSLEEP
Sleep mode input. nSLEEP is in low-power sleep mode at logic low.
Float to enable.
26 23 OC_REF
Over-current protection reference input.
27 24 DT
Dead time setting.
28 25 GND
Ground.
