BD6761FS,BD6762FV
Technical Note
10/22
www.rohm.com
2010.06 - Rev.
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2)BD6762FV
Forward rotation (F/R=Low), 120° (120/SL=High)
Input conditions
Output state
High-side gate Low-side gate Output
Pin No.
15 17 19 3 6 9 5 8 11 4 7 10
HU+ HV+ HW+ UHG VHG WHG ULG VLG WLG U V W
Condition 1 L L H L H L L L H M H L
Condition 2 H L H L H L H L L L H M
Condition 3 H L L L L H H L L L M H
Condition 4 H H L L L H L H L M L H
Condition 5 L H L H L L L H L H L M
Condition 6 L H H H L L L L H H M L
Reverse rotation (F/R=High), 120° (120/SL=High)
Input condition
Output state
High-side gate Low-side gate Output
Pin No.
15 17 19 3 6 9 5 8 11 4 7 10
HU+ HV+ HW+ UHG VHG WHG ULG VLG WLG U V W
Condition 1 L L H L L H L H L M L H
Condition 2 H L H H L L L H L H L M
Condition 3 H L L H L L L L H H M L
Condition 4 H H L L H L L L H M H L
Condition 5 L H L L H L H L L L H M
Condition 6 L H H L L H H L L L M H
ST/SP Mode
OPEN or High Standby
L Operating mode
＜Input condition＞
Hall input voltage H ： 2.0V
M ： 1.5V
L ： 1.0V
HU-, HV-, HW- ： M
＜Output criteria＞
High-side FET gate voltage : L≦output (U, V, W) + 1V, VG - 1V≦H
Low-side FET gate voltage : L≦1V, 9V≦H
