LTC3539/LTC3539-2
6
35392fc
For more information www.linear.com/3539/3539-2
BLOCK DIAGRAM
PIN FUNCTIONS
SW (Pin 1): Switch Pin. Connect inductor between SW
and V
IN
. Keep PCB trace lengths as short and wide as pos-
sible to reduce EMI. If the inductor current falls to zero,
or
SHDN is low, an internal anti-ring resistor is connected
from SW to V
IN
to minimize EMI.
PGND (Pin 2), GND (Pin 3): Signal and Power Ground.
Provide a short direct PCB path between PGND, GND and
the (–) side of the input and output capacitors.
V
IN
(Pin 4): Battery Input Voltage. Connect a minimum of
2.2µF ceramic decoupling capacitor from this pin to ground.
SHDN (Pin 5): Logic Controlled Shutdown Input. There
is an internal 4MΩ pull-down on this pin.
SHDN = High: Normal operation.
SHDN = Low: Shutdown, quiescent current <1µA.
FB (Pin 6): Feedback Input to the g
m
Error Amplifier.
Connect resistor divider tap to this pin. The output volt-
age can
be adjusted from 1.5V to 5.25V by: V
OUT
= 1.20V
• [1 + (R2/R1)]
MODE (Pin 7): Burst Mode Pin. A logic controlled input
to select either automatic Burst Mode operation or forced
fixed frequency operation.
MODE = High: Burst Mode operation at light loads
MODE = Low: Fixed frequency PWM Mode
V
OUT
(Pin 8): Output Voltage Sense and Drain of the
Internal Synchronous Rectifier. PCB trace length from
V
OUT
to the output filter capacitor should be as short and
wide as possible.
Exposed Pad (Pin 9): The exposed pad must be soldered
to the PCB ground plane. It serves as another ground
connection, and as a means of conducting heat away
from the die.
–
+
–
+
3539 BD
SW
SHDN
V
OUT
V
OUT
EXPOSED PAD
WAKE
BURST
I
ZERO
SOFT-START
ERROR
AMPLIFIER/SLEEP
COMPARATOR
I
PK
COMPARATOR
I
ZERO
COMPARATOR
SLOPE
COMPARATOR
I
PK
GND
V
IN
IN
MODE
FB
FB
R2
+
–
LOGIC AND
BURST MODE
CONTROL
GATE DRIVERS
AND
ANTI-CROSS
CONDUCTION
THERMAL
SHUTDOWN
START-UP
CLAMP
SHUTDOWN SHUTDOWN
V
BEST
V
OUT
V
B
V
SEL
UVLO
UVLO
TSD
V
REF
V
REF
V
REF
Σ
WELL
SWITCH
R1
1MHz/2MHz
OSC
CLK
BURSTPWM
ONOFF
1 4
8
6
3
PGND
29
7
5