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SN74ACT10DRE4

P1-P3P4-P6P7-P9P10-P12P13-P15
XC7SHU04_1 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 01 — 7 September 2009 6 of 14
NXP Semiconductors
XC7SHU04
Inverter
12. Waveforms
Measurement points are given in Table 9.
Fig 5. Input (A) to output (Y) propagation delays
mna111
A input
Y output
t
PHL
t
PLH
V
M
V
M
Table 9. Measurement point
Type Input Input Output
V
I
V
M
V
M
XC7SHU04 GND to V
CC
0.5 × V
CC
0.5 × V
CC
Test data is given in Table 10. Definitions for test circuit:
C
L
= Load capacitance including jig and probe capacitance.
R
T
= Termination resistance should be equal to output impedance Z
o
of the pulse generator.
Fig 6. Load circuitry for switching times
mna101
V
CC
V
I
V
O
R
T
C
L
PULSE
GENERATOR
DUT
Table 10. Test data
Type Input Load Test
V
I
t
r
, t
f
C
L
XC7SHU04 V
CC
≤ 3.0 ns 15 pF, 50 pF t
PLH
, t
PHL
XC7SHU04_1 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 01 — 7 September 2009 7 of 14
NXP Semiconductors
XC7SHU04
Inverter
13. Typical transfer characteristics
Fig 7. V
CC
= 2.0 V; I
O
= 0 A Fig 8. V
CC
= 3.0 V; I
O
=0 A
2.00.4 0.8 1.2 1.6
0
1.0
0
0.6
0.2
0.8
0.4
2.0
0
1.2
0.4
1.6
0.8
mna397
V
O
(V)
I
CC
(mA)
V
I
(V)
V
O
I
D
(drain current)
01 3
3.0
0
mna398
2
1.5
10
0
6
2
8
4
V
O
(V)
I
CC
(mA)
V
O
I
D
(drain current)
V
I
(V)
Fig 9. V
CC
= 5.5 V; I
O
= 0 A Fig 10. Test set-up for measuring forward
transconductance g
fs
= ∆I
O
/∆V
I
at V
O
is
constant
02 6
6
0
3
50
0
30
10
40
20
mna399
4
V
O
(V)
V
O
I
CC
(mA)
V
I
(V)
I
D
(drain current)
mna050
V
CC
R
bias
= 560 kΩ
input
0.47 µF
100 µF
output
A
GND
I
O
V
I
(f = 1 kHz)
XC7SHU04_1 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 01 — 7 September 2009 8 of 14
NXP Semiconductors
XC7SHU04
Inverter
14. Application information
Some applications are:
• Linear amplifier (see Figure 12)
• In crystal oscillator design (see Figure 13)
Remark: All values given are typical unless otherwise specified.
Fig 11. Typical forward transconductance g
fs
as a function of the supply voltage at T
amb
=25°C
0246
40
30
10
0
20
mna400
V
CC
(V)
g
fs
(mA/V)
Maximum V
o(p-p)
=V
CC
− 1.5 V centered at 0.5 × V
CC
.
G
ol
= open loop gain
G
v
= voltage gain
R1 ≥ 3kΩ,R2≤ 1MΩ
Z
L
>10kΩ; G
ol
= 20 (typ.)
Typical unity gain bandwidth product is 5 MHz.
C1 = 47 pF (typ.)
C2 = 22 pF (typ.)
R1 = 1 MΩ to 10 MΩ (typ.)
R2 optimum value depends on the frequency and
required stability against changes in V
CC
or average
minimum I
CC
(I
CC
is typically 2 mA at V
CC
= 3 V and
f = 1 MHz).
Fig 12. Used as a linear amplifier Fig 13. Crystal oscillator configuration
U04
R1
R2
V
CC
Z
L
mna052
1 µF
mna053
U04
out
R2
R1
C1 C2
G
v
G
ol
1
R1
R2
-------
1G
ol
+()+
---------------------------------------
–=
P1-P3P4-P6P7-P9P10-P12P13-P15

SN74ACT10DRE4

Mfr. #:
Buy SN74ACT10DRE4
Manufacturer:
Texas Instruments
Description:
Logic Gates Triple 3-Input Positive-NAND gates
Lifecycle:
New from this manufacturer.
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