STB5600
GPS RF FRONT-END IC
ONE CHIP SYSTEM TO INTERFACE
ACTIVE ANTENNA TO ST20GP1
MICROCONTROLLER
COMPLETE RECEIVER USING NOVEL
DUAL CONVERSION ARCHITECTURE WITH
SINGLE IF FILTER
MINIMUMEXTERNAL COMPONENTS
COMPATIBLE WITH GPS L1 SPS SIGNAL
INTERNALLY STABILISED POWER RAILS
CMOS OUTPUT LEVELS
FROM 3.3 TO 5.9V SUPPLY VOLTAGE
TQFP32 PACKAGE
DESCRIPTION
The STB5600, using STMicroelectronics HSB2,
High Speed Bipolar technology, implements a
Global Positioning System RF front-end.
The chip provides down conversion from the GPS
(L1) signal at 1575 MHz via an IF of 20MHz to an
output frequency of 4MHz suitable for ST20GP1
GPS processor.
It uses a single external reference oscillator to
generate both RF local oscillator signals and the
processor reference clock.
PIN CONNECTION (top view)
August 1998
TQFP32
MARKING:
STB5600
TRACEAB. CODE
ASSY CODE
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FUNCTIONAL DESCRIPTION
The STB5600 GPS front-end is fed with the signal from an active antenna, via a ceramic RF filter. The
gain between the antenna element and the STB5600 is expected to be between 10dB and 35dB
overall, made up of the antenna LNA gain, the feeder loss, connector loss,and the ceramic filter loss.
In order to use an off-the-shelfceramic filter, conventionally50 Ohms single ended, a matchingcircuit is
used. (see appendix A.1), which provides a 300 Ohm differential drive to the STB5600. A similar circuit
can be used to feed the LO signal if using the recommended low-cost oscillator circuit (appendix A.3).
Note that the STB5600 radio architecture and the oscillator described here are covered by various
patents held by SGS-Thomson and by others. The use of the circuits described in this data-sheetfor any
other purpose may infringesuch patents.
- RF SECTION
The differential input signal is amplified by the RF-Amp and mixed with the oscillator signal amplified
from the LO+,LO- inputs to generate a balanced 20.46MHz IF signal. The LO buffer amplifier may be
fed differentialor single ended signals, at levels between -60dBmand -20dBm .
- IF SECTION
The 20MHz differentialsignal from the mixer is fed throughan external LC filter to suppressundesirable
signals and mixer products. The multi-stage high-sensitivity limiting amplifier is connected to a D-type
latch clocked by an internally derived 16MHz clock.. The effect of sampling the 20MHz signal at 16MHz
is to create a sub-sampling alias at 4MHz. This is fed to the outputlevel-converters.
- DIVIDER SECTION
The 80MHz oscillator signal may be provided single-ended or differentially to the high impedance
80MHz+, 80MHz- inputs. Any unused inputs should be connected to GNDLOGIC via a 1nF capacitor.
The 80MHz signal is amplified, then divided by 5 to create the 16.368MHz clock required by the
ST20GP1processor, also used to clockthe outputlatch of the STB5600.
- OUTPUT SECTION
The output latch samples the 20.46MHz intermediate frequency at a 16.368MHz rate, performing the
dual function of second downconversion and latching. The downconversion occurs by sub-sampling
aliasing, such that the digital output representsa 4.096MHzcentre frequency
The output buffers perform level translation from the internal ECL levels to CMOS compatible outputs
referred to external ground.
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
CC
DC Supply Voltage 5.9 V
RF+, RF- RF Input 8 dBm
T
j
Junction Temperature 150
o
C
T
stg
Storage Temperature Range -40 to 125
o
C
R
thj-amb
Thermal Resistance Junction-ambient 80
o
C/W
STB5600
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PIN CONFIGURATION
Apply 5V at the CE, V
CCRF
,V
CCIF
,V
CCLOGIC
pins, apply 3 V at the V
CCDRIVE
Pin Symbol Typ. DC Bias Dexription External circuit
1 IF1+ 3.6 V Mixer Output 1 see application circuit
2 IF1- 3.6 V Mixer Output 2 see application circuit
3V
CCRF
5 V RF Power Supply 100 nF to V
EERF
4 RF+ 3.5 V RF Input AC Coupled
5 RF- 3.5 V RF Input AC Coupled
6V
CCRF
5 V RF Power Supply 100 nF to VEERF
7V
EERF
2 V RF Voltage Reference 100 nF to VCCRF
8 GNDRF 0 V RF Ground
9V
CCRF
5 V RF Power Supply 100 nF to VEERF
10 LO+ 3.5 V Local Oscillator Input AC Coupled
11 LO- 3.5 V Local Oscillator Input AC Coupled
12 V
CCRF
5 V RF Power Supply 100 nF to VEERF
13 V
CCLOGIC
5 V Logic Power Supply 100 nF to VEELOGIC
14 80 MHz+ 4 V 80 MHz Clock Input AC Coupled
15 80 MHz- 4 V 80 MHz Clock Input AC Coupled
16 V
CCLOGIC
5 V Logic Power Supply 100 nF to VEELOGIC
17 V
EELOGIC
2 V Logic Voltage Reference 100 nF to VCCLOGIC
18 CLOCK+ 0.3 V or 3 V 16 MHz Clock CMOS Output 7 pF to GND
DRIVE
19 Not Connected
20 GND
DRIVE
0 V CMOS Drive Ground
21 DATA 0.3 V or 3 V 4 MHz Data CMOS Output 7 pF to GND
DRIVE
22 GND
DRIVE
0 V CMOS Drive Ground
23 V
CCDRIVE
3 V CMOS Drive Power Supply
24 CE 3 V Chip Enable
25 GND 0 V Substrate Ground
26 GND
LOGIC
0 V Logic Ground
27 GND
IF
0 V IF Ground
28 V
EEIF
2 V IF Voltage Reference 100 nF to VCCIF
29 V
CCIF
5 V IF Power Supply 100 nF to VEEIF
30 IF2- 4 V Limiting Amplifier Input see application circuit
31 IF2+ 4 V Limiting Amplifier Input see application circuit
32 V
CCIF
5 V IF Power Supply 100 nF to VEEIF
STB5600
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STB5600TR

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
RF Wireless Misc GPS Front-End
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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