PI90LV211LE

4
PS8535C 10/04/04
PI90LV211/PI90LVT211
1:6 Differential Clock
Distribution Chip
Figure 1. Voltage and Current Definitions
Parameter Measurement Information
Figure 2. V
OD
Test Circuit
Note:
1. All input pulses are supplied by a generator having the following characteristics: t
r
or t
f
1ns, Pulse Repetition Rate
(PRR) = 50 Mpps, Pulse width = 10 ±0.2ns. C
L
includes instrumentation and fixture capacitance within 0.06m of the D.U.T.
Themeasurement of VOC(PP) is made on test equipment with a –3dB bandwidth of at least 300MHz.
Figure 3. Test Circuit & Definitions for the Driver Common-Mode Output Voltage
D
IN
D
OUT+
D
OUT–
V
ODOUT–
V
ODOUT+
I
OY
GND
V
OD
V
I
V
OC
(V
ODOUT+
+V
ODOUT–
)/2
I
I
I
OZ
Input
V
OD
100
3.75k
3.75k
0V V
TEST
2.4V
±
D
OUT+
D
OUT–
Input
3V
0V
V
I
V
OC
V
OC(PP)
V
OC(SS)
49.9±1% (2 places)
D
OUT+
D
OUT–
5
PS8535C 10/04/04
PI90LV211/PI90LVT211
1:6 Differential Clock
Distribution Chip
Figure 4. Test Circuit, Timing, & Voltage Definitions for the Differential Output Signal
Parameter Measurement Information (continued)
Note:
1. All input pulses are supplied by a generator having the following characteristics: t
r
or t
f
1ns, Pulse Repetition Rate
(PRR) = 15 Mpps, Pulse width = 10 ±0.2ns. C
L
includes instrumentation and fixture capacitance within 0.06m of the D.U.T.
Note:
1. All input pulses are supplied by a generator having the following characteristics: t
r
or t
f
1ns, Pulse Repetition Rate
(PRR) = 0.5 Mpps, Pulse width = 500 ±10ns. C
L
includes instrumentation and fixture capacitance within 0.06m of the D.U.T.
Figure 5. Enable & Disable Time Circuit & Definitions
Input
1.4V
32V
100%
80%
20%
0%
Input
Output
0V
V
OD
C
L
= 10pF
V
OD(H)
t
PLH
t
f
t
r
t
PHL
V
OD(L)
100±1%
0.8V
(2 places)
D
OUT+
D
OUT–
0.8V or 2V
Input
49.9 ±1% (2 places)
1.2V
+
1V
Input
2V
1.2V
1.1V
1.4V
0.8V
t
PZL
t
PLZ
1.2V
V
ODOUT+
or
V
ODOUT–
V
ODOUT–
or
V
ODOUT+
1.4V
1.3V
t
PZH
t
PHZ
D
OUT+
D
OUT–
V
ODOUT+
V
ODOUT–
6
PS8535C 10/04/04
PI90LV211/PI90LVT211
1:6 Differential Clock
Distribution Chip
Figure 6. Cycle-to-Cycle Jitter
Figure 7. Period Jitter
CLKOUT–
CLKOUT+
CLKOUT–
CLKOUT+
t
cycle n
f
O
1
t
jit(per)
=
t
cycle n
f
O
1
t
jit(cc)
=
t
cycle n
-
t
cycle n+1
t
cycle n+1
t
cycle n
CLKOUT–
CLKOUT+

PI90LV211LE

Mfr. #:
Manufacturer:
Diodes Incorporated
Description:
Clock Drivers & Distribution 1:6 LVDS Clock Distribution
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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